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| author | Madalin Bucur <madalin.bucur@oss.nxp.com> | 2020-04-23 16:25:11 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-04-29 11:10:54 +0530 |
| commit | d86ab1bc050fce88a2b1af2c325b246e565e95e8 (patch) | |
| tree | 1638b48ccabff8ac369cfd7f61d22d1545753aeb /arch/arm/dts/qoriq-fman3-0-10g-1.dtsi | |
| parent | a2c402cc3c01f07346b6bb8d6a078b4bc954fd4b (diff) | |
| download | u-boot-d86ab1bc050fce88a2b1af2c325b246e565e95e8.tar.gz | |
ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodes
Add the QorIQ DPAA Frame Manager v3 device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/dts/qoriq-fman3-0-10g-1.dtsi')
| -rw-r--r-- | arch/arm/dts/qoriq-fman3-0-10g-1.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi new file mode 100644 index 0000000000..b5eb22f6a9 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x11: port@91000 { + cell-index = <0x11>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x91000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x31: port@b1000 { + cell-index = <0x31>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb1000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; + pcsphy-handle = <&pcsphy7>; + status = "disabled"; + }; + + mdio@f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf3000 0x1000>; + + pcsphy7: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; |