diff options
author | Stefan Agner <stefan.agner@toradex.com> | 2019-01-08 12:42:29 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2019-01-28 13:02:08 +0100 |
commit | d8a32f52a6fc21c012e55ac5fbcc245493b515b7 (patch) | |
tree | 8a26e772c44b6a93ee6c3374ade6c9eb47a970ea /arch/arm/dts/imx7-colibri-rawnand.dts | |
parent | 2bc18ce570ab4f1ba91974376bb5377ca4990203 (diff) | |
download | u-boot-d8a32f52a6fc21c012e55ac5fbcc245493b515b7.tar.gz |
arm: dts: imx7: colibri: split dt for raw NAND and eMMC devices
In preparation of adding CONFIG_DM_MMC support use separate device
trees for raw NAND and eMMC devices.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm/dts/imx7-colibri-rawnand.dts')
-rw-r--r-- | arch/arm/dts/imx7-colibri-rawnand.dts | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts b/arch/arm/dts/imx7-colibri-rawnand.dts new file mode 100644 index 0000000000..4eb86fb011 --- /dev/null +++ b/arch/arm/dts/imx7-colibri-rawnand.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex AG + */ + +/dts-v1/; +#include "imx7-colibri.dtsi" + +/ { + model = "Toradex Colibri iMX7S/D"; + compatible = "toradex,imx7-colibri", "fsl,imx7"; + + chosen { + stdout-path = &uart1; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,use-minimum-ecc; + nand-on-flash-bbt; + nand-ecc-mode = "hw"; + status = "okay"; +}; + +&iomuxc { + pinctrl_gpmi_nand: gpmi-nand-grp { + fsl,pins = < + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 + MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 + MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 + MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71 + MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71 + MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 + MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 + MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + >; + }; +}; |