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author | Tom Rini <trini@ti.com> | 2014-08-29 11:07:10 -0400 |
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committer | Tom Rini <trini@ti.com> | 2014-08-29 11:07:10 -0400 |
commit | 5ddc329341a9a143f0567494e5f874008b22e1a7 (patch) | |
tree | f3876e495e2b8a9f222edb88fa1c610e6639d68b /arch/arm/cpu | |
parent | 5a1095a830299aef8dd32495e505e92ab1749e89 (diff) | |
parent | a78cf41e79f64fe90f573b07ee3c88be533b97ca (diff) | |
download | u-boot-5ddc329341a9a143f0567494e5f874008b22e1a7.tar.gz |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/tegra-common/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/cpu/tegra-common/ap.c | 3 | ||||
-rw-r--r-- | arch/arm/cpu/tegra-common/board.c | 18 | ||||
-rw-r--r-- | arch/arm/cpu/tegra-common/vpr.c | 35 |
4 files changed, 56 insertions, 1 deletions
diff --git a/arch/arm/cpu/tegra-common/Makefile b/arch/arm/cpu/tegra-common/Makefile index 892556e644..a18c318739 100644 --- a/arch/arm/cpu/tegra-common/Makefile +++ b/arch/arm/cpu/tegra-common/Makefile @@ -14,3 +14,4 @@ obj-y += clock.o obj-y += lowlevel_init.o obj-y += pinmux-common.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o +obj-$(CONFIG_TEGRA124) += vpr.o diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c index 91d70da656..a17dfd1e22 100644 --- a/arch/arm/cpu/tegra-common/ap.c +++ b/arch/arm/cpu/tegra-common/ap.c @@ -163,4 +163,7 @@ void s_init(void) /* init the cache */ config_cache(); + + /* init vpr */ + config_vpr(); } diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 6a6faf4b27..433da09d10 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -27,11 +27,12 @@ enum { UART_COUNT = 5, }; +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ + defined(CONFIG_TEGRA114) /* * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0, * so we are using this value to identify memory size. */ - unsigned int query_sdram_size(void) { struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; @@ -72,6 +73,21 @@ unsigned int query_sdram_size(void) } #endif } +#else +#include <asm/arch/mc.h> + +/* Read the RAM size directly from the memory controller */ +unsigned int query_sdram_size(void) +{ + struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE; + u32 size_mb; + + size_mb = readl(&mc->mc_emem_cfg); + debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb); + + return size_mb * 1024 * 1024; +} +#endif int dram_init(void) { diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c new file mode 100644 index 0000000000..f695811c9b --- /dev/null +++ b/arch/arm/cpu/tegra-common/vpr.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/* Tegra vpr routines */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra.h> +#include <asm/arch/mc.h> + +/* Configures VPR. Right now, all we do is turn it off. */ +void config_vpr(void) +{ + struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; + + /* Turn VPR off */ + writel(0, &mc->mc_video_protect_size_mb); + writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, + &mc->mc_video_protect_reg_ctrl); + /* read back to ensure the write went through */ + readl(&mc->mc_video_protect_reg_ctrl); +} |