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authorUdit Agarwal <udit.agarwal@nxp.com>2019-11-07 16:11:32 +0000
committerPriyanka Jain <priyanka.jain@nxp.com>2019-11-08 16:32:08 +0530
commit5536c3c9d0d10c1a4e440e71eac389df3a3dbfa7 (patch)
tree46c4698bd06a9e9532379a5f1854d79389b9247c /arch/arm/cpu
parent56e6f810b0ac46ddccb6237acb60ab7752a41a99 (diff)
downloadu-boot-5536c3c9d0d10c1a4e440e71eac389df3a3dbfa7.tar.gz
freescale/layerscape: Rename the config CONFIG_SECURE_BOOT name
Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC to avoid conflict with UEFI secure boot. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/spl.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 94fa68250d..b9511da3f3 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -50,8 +50,8 @@ config MAX_CPUS
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
-config SECURE_BOOT
- bool "Secure Boot"
+config NXP_ESBC
+ bool "NXP_ESBC"
help
Enable Freescale Secure Boot feature. Normally selected
by defconfig. If unsure, do not change.
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 046dcf539e..f1578b10bc 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -376,8 +376,8 @@ config EMC2305
Enable the EMC2305 fan controller for configuration of fan
speed.
-config SECURE_BOOT
- bool "Secure Boot"
+config NXP_ESBC
+ bool "NXP_ESBC"
help
Enable Freescale Secure Boot feature
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 8eeeef199b..3f6a5f6a42 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -34,7 +34,7 @@ u32 spl_boot_device(void)
void spl_board_init(void)
{
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2)
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
/*
* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.