diff options
author | Alison Wang <b18965@freescale.com> | 2017-12-28 13:00:55 +0800 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2018-01-10 12:29:57 -0800 |
commit | ab0ab54e49180d701fd5fdefb4a819ed086eadee (patch) | |
tree | a0a93c8200f03c78ec45cb38f349189b2016fbac /arch/arm/cpu/armv8/fsl-layerscape/Kconfig | |
parent | 541d57663f12c33ed8e81143d87143e4f2c885ce (diff) | |
download | u-boot-ab0ab54e49180d701fd5fdefb4a819ed086eadee.tar.gz |
armv8: Implement workaround for Cortex-A53 erratum 855873
855873: An eviction might overtake a cache clean operation
Workaround: The erratum can be avoided by upgrading cache clean by
address operations to cache clean and invalidate operations. For
Cortex-A53 r0p3 and later release, this can be achieved by setting
CPUACTLR.ENDCCASCI to 1.
This patch is to implement the workaround for this erratum.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/Kconfig')
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index d5f0e55964..cefbdfe855 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,6 +1,7 @@ config ARCH_LS1012A bool select ARMV8_SET_SMPEN + select ARM_ERRATA_855873 select FSL_LSCH2 select SYS_FSL_DDR_BE select SYS_FSL_MMDC @@ -16,6 +17,7 @@ config ARCH_LS1012A config ARCH_LS1043A bool select ARMV8_SET_SMPEN + select ARM_ERRATA_855873 select FSL_LSCH2 select SYS_FSL_DDR select SYS_FSL_DDR_BE @@ -68,6 +70,7 @@ config ARCH_LS1046A config ARCH_LS1088A bool select ARMV8_SET_SMPEN + select ARM_ERRATA_855873 select FSL_LSCH3 select SYS_FSL_DDR select SYS_FSL_DDR_LE |