diff options
| author | Lokesh Vutla <lokeshvutla@ti.com> | 2018-04-26 18:21:30 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-05-07 15:53:29 -0400 |
| commit | f2ef204312480bfba7700f47c8ce9fb975c26557 (patch) | |
| tree | 3fd338e772be2cbec3c1a6b4a847d7d6ae673eae /arch/arm/cpu/armv7m | |
| parent | 4bbd6b1d946ab6165bff8aeae6f252faa07ce85a (diff) | |
| download | u-boot-f2ef204312480bfba7700f47c8ce9fb975c26557.tar.gz | |
arm: v7R: Add support for MPU
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/armv7m')
| -rw-r--r-- | arch/arm/cpu/armv7m/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7m/mpu.c | 43 |
2 files changed, 4 insertions, 42 deletions
diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile index 6c78d29ac4..baeac9343d 100644 --- a/arch/arm/cpu/armv7m/Makefile +++ b/arch/arm/cpu/armv7m/Makefile @@ -4,5 +4,6 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. extra-y := start.o -obj-y += cpu.o cache.o mpu.o +obj-y += cpu.o cache.o +obj-$(CONFIG_SYS_ARM_MPU) += mpu.o obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c index d89d9f2f39..81e7492f1c 100644 --- a/arch/arm/cpu/armv7m/mpu.c +++ b/arch/arm/cpu/armv7m/mpu.c @@ -6,7 +6,7 @@ #include <linux/bitops.h> #include <asm/armv7m.h> -#include <asm/armv7m_mpu.h> +#include <asm/armv7_mpu.h> #include <asm/io.h> #define V7M_MPU_CTRL_ENABLE BIT(0) @@ -15,20 +15,6 @@ #define V7M_MPU_CTRL_PRIVDEFENA BIT(2) #define VALID_REGION BIT(4) -#define ENABLE_REGION BIT(0) - -#define AP_SHIFT 24 -#define XN_SHIFT 28 -#define TEX_SHIFT 19 -#define S_SHIFT 18 -#define C_SHIFT 17 -#define B_SHIFT 16 -#define REGION_SIZE_SHIFT 1 - -#define CACHEABLE (1 << C_SHIFT) -#define BUFFERABLE (1 << B_SHIFT) -#define SHAREABLE (1 << S_SHIFT) - void disable_mpu(void) { writel(0, &V7M_MPU->ctrl); @@ -47,32 +33,7 @@ void mpu_config(struct mpu_region_config *reg_config) { uint32_t attr; - switch (reg_config->mr_attr) { - case STRONG_ORDER: - attr = SHAREABLE; - break; - case SHARED_WRITE_BUFFERED: - attr = BUFFERABLE; - break; - case O_I_WT_NO_WR_ALLOC: - attr = CACHEABLE; - break; - case O_I_WB_NO_WR_ALLOC: - attr = CACHEABLE | BUFFERABLE; - break; - case O_I_NON_CACHEABLE: - attr = 1 << TEX_SHIFT; - break; - case O_I_WB_RD_WR_ALLOC: - attr = (1 << TEX_SHIFT) | CACHEABLE | BUFFERABLE; - break; - case DEVICE_NON_SHARED: - attr = (2 << TEX_SHIFT) | BUFFERABLE; - break; - default: - attr = 0; /* strongly ordered */ - break; - }; + attr = get_attr_encoding(reg_config->mr_attr); writel(reg_config->start_addr | VALID_REGION | reg_config->region_no, &V7M_MPU->rbar); |