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authorYangbo Lu <yangbo.lu@nxp.com>2019-11-12 19:28:38 +0800
committerPeng Fan <peng.fan@nxp.com>2019-11-27 16:55:56 +0800
commitd3eb317ea50ef763a5a1ef5ff4e2bc19498542d1 (patch)
tree1e93247139eff9a521651669e8183f274383f105 /arch/arm/cpu/armv7
parentd9114e2b73552be7f9035c7567ea14febefa0dce (diff)
downloadu-boot-d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1.tar.gz
arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/clock.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c
index 30c7b37f1a..7a1053cebb 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -109,8 +109,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_bus_freq(0) / 2;
- case MXC_ESDHC_CLK:
- return get_bus_freq(0);
case MXC_DSPI_CLK:
return get_bus_freq(0) / 2;
case MXC_UART_CLK: