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| author | Trevor Woerner <trevor@toganlabs.com> | 2019-05-03 09:41:00 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-18 08:15:35 -0400 |
| commit | 1001502545ff0125c39232cf0e7f26d9213ab55f (patch) | |
| tree | 6513e23c1df21e1a4bc55eb98a73a58f269ccf46 /arch/arm/cpu/arm926ejs/start.S | |
| parent | a0aba8a2ebae51287fbee6848aece71655795fdb (diff) | |
| download | u-boot-1001502545ff0125c39232cf0e7f26d9213ab55f.tar.gz | |
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/start.S')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/start.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 1045673292..ff592ba810 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -84,7 +84,7 @@ flush_dcache: /* * disable MMU and D cache - * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined + * enable I cache if SYS_ICACHE_OFF is not defined */ mrc p15, 0, r0, c1, c0, 0 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */ @@ -95,7 +95,7 @@ flush_dcache: bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */ #endif orr r0, r0, #0x00000002 /* set bit 1 (A) Align */ -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ #endif mcr p15, 0, r0, c1, c0, 0 |