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authorMichal Simek <michal.simek@xilinx.com>2018-08-22 14:55:27 +0200
committerMichal Simek <michal.simek@xilinx.com>2018-10-16 16:53:21 +0200
commitec48b6c991f400c8583ac2f875d65a8539f0b437 (patch)
treedd94b74d469d43e15c8db343ce78c96e6b73db1e /Kconfig
parente6149576e8dab0684e885b206b0fcde0c16402c1 (diff)
downloadu-boot-ec48b6c991f400c8583ac2f875d65a8539f0b437.tar.gz
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'Kconfig')
-rw-r--r--Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/Kconfig b/Kconfig
index 1aadf5dd2d..dca9bb4e43 100644
--- a/Kconfig
+++ b/Kconfig
@@ -144,7 +144,7 @@ config SYS_MALLOC_F_LEN
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
- depends on ARCH_ZYNQ
+ depends on ARCH_ZYNQ || ARCH_VERSAL
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures