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authorTom Rini <trini@konsulko.com>2019-03-19 07:13:23 -0400
committerTom Rini <trini@konsulko.com>2019-03-19 07:13:23 -0400
commit810ae23fbc57346508690425a785d44117e91182 (patch)
tree029e98c6c4d4a293488b697a4edb7c06af43a745
parent7eddda453710d2405e05bb0b79612103608c244a (diff)
parent92a47459bb85ba3e835b11ddbdcdfb571280614f (diff)
downloadu-boot-810ae23fbc57346508690425a785d44117e91182.tar.gz
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
-rw-r--r--arch/arm/dts/socfpga_stratix10.dtsi3
-rw-r--r--include/configs/socfpga_common.h2
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi
index ccd3f32301..ee93725d64 100644
--- a/arch/arm/dts/socfpga_stratix10.dtsi
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -95,6 +95,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth";
+ altr,sysmgr-syscon = <&sysmgr 0x44 0>;
status = "disabled";
};
@@ -106,6 +107,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth";
+ altr,sysmgr-syscon = <&sysmgr 0x48 0>;
status = "disabled";
};
@@ -117,6 +119,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth";
+ altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
status = "disabled";
};
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 181af9b646..191204b27b 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -248,8 +248,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
* 0xFFEz_zzzz ...... Malloc area (grows up to top)
* 0xFFE3_FFFF ...... End of SRAM (top)
*/
+#ifndef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
+#endif
#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
/* SPL memory allocation configuration, this is for FAT implementation */