diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2017-07-27 12:53:59 +0800 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-08-13 17:15:08 +0200 |
| commit | 18d38d3a9484b34046d49dc212288588ce1d8db2 (patch) | |
| tree | a7a201abddc5cc68cf14d04113bc62ecf8c4fbd6 | |
| parent | bf82e200a9cf45773d67ef0e67c6262f592dda6d (diff) | |
| download | u-boot-18d38d3a9484b34046d49dc212288588ce1d8db2.tar.gz | |
rockchip: rk322x: set the DDR region as non-secure in SPL
Disable the ddr secure region setting in SPL and the ddr memory
becomes non-secure, every one can access it. the trust firmware
like OPTEE should have the correct setting for it after SPL if
there is one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| -rw-r--r-- | arch/arm/mach-rockchip/rk322x-board-spl.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 15216c74b0..4ddb8ba065 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -41,6 +41,8 @@ static struct rk322x_grf * const grf = (void *)GRF_BASE; CON_IOMUX_UART2SEL_MASK, CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); } + +#define SGRF_DDR_CON0 0x10150000 void board_init_f(ulong dummy) { struct udevice *dev; @@ -71,6 +73,8 @@ void board_init_f(ulong dummy) return; } + /* Disable the ddr secure region setting to make it non-secure */ + rk_clrreg(SGRF_DDR_CON0, 0x4000); #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif |