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| author | Nishanth Menon <nm@ti.com> | 2018-06-12 15:24:11 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-06-29 11:30:39 -0400 |
| commit | 94c6a89a99ce651b97fae565b32d79bf86643415 (patch) | |
| tree | 4bba4ecc95a75307dfe1cb17c6ea10abfd77e8c5 | |
| parent | dbb7caf110c4a7b9afb7cdc195ac6967d3a30adf (diff) | |
| download | u-boot-94c6a89a99ce651b97fae565b32d79bf86643415.tar.gz | |
ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715
Enable CVE-2017-5715 option to set the IBE bit. This enables kernel
workarounds necessary for the said CVE.
With this enabled, Linux reports:
CPU0: Spectre v2: using BPIALL workaround
This workaround may need to be re-applied in OS environment around low
power transition resume states where context of ACR would be lost (off-mode
etc).
Signed-off-by: Nishanth Menon <nm@ti.com>
| -rw-r--r-- | arch/arm/mach-omap2/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 77820cc8d1..f4babc8d26 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -10,6 +10,7 @@ config OMAP34XX select ARM_ERRATA_454179 select ARM_ERRATA_621766 select ARM_ERRATA_725233 + select ARM_CORTEX_A8_CVE_2017_5715 select USE_TINY_PRINTF imply NAND_OMAP_GPMC imply SPL_EXT_SUPPORT @@ -116,6 +117,7 @@ config AM43XX config AM33XX bool "AM33XX SoC" select SPECIFY_CONSOLE_INDEX + select ARM_CORTEX_A8_CVE_2017_5715 imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_NAND_AM33XX_BCH |