diff options
| author | Marek Behún <marek.behun@nic.cz> | 2020-04-08 12:02:03 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2020-04-14 13:16:42 +0200 |
| commit | b80ca8176dc0e78d3fb22b2389c847a5d96ee583 (patch) | |
| tree | ae9fa14843e7238e8b157f1d8680e3c3264b6e82 | |
| parent | 27f48f7dc4f57d0109f6333eb5148d0e9c3dbd95 (diff) | |
| download | u-boot-b80ca8176dc0e78d3fb22b2389c847a5d96ee583.tar.gz | |
arm: mvebu: turris_mox: Fix early SPI communication
The SPI clock signal changes value when the SPI configuration register
is configured. This can sometimes lead to the device misinterpreting
the enablement of the SPI controller as actual clock tick.
This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode,
and only after that writing the SPI configuration register.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | board/CZ.NIC/turris_mox/turris_mox.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 377191baef..0b13d1d190 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -67,9 +67,11 @@ int board_fix_fdt(void *blob) * to read SPI by reading/writing SPI registers directly */ - writel(0x563fa, ARMADA_37XX_NB_GPIO_SEL); writel(0x10df, ARMADA_37XX_SPI_CFG); - writel(0x2005b, ARMADA_37XX_SPI_CTRL); + /* put pin from GPIO to SPI mode */ + clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12)); + /* enable SPI CS1 */ + setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17)); while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2)) udelay(1); @@ -89,7 +91,8 @@ int board_fix_fdt(void *blob) size = i; - writel(0x5b, ARMADA_37XX_SPI_CTRL); + /* disable SPI CS1 */ + clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17)); if (size > 1 && (topology[1] == MOX_MODULE_PCI || topology[1] == MOX_MODULE_USB3 || |