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| author | Michal Simek <michal.simek@xilinx.com> | 2020-09-04 16:21:47 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-09-23 10:31:41 +0200 |
| commit | e2572b55440fefa109dc2301228e2d6cc1cca229 (patch) | |
| tree | b0b21efaf106b3d15f6eefdb5676d3285a020f98 | |
| parent | 6cb402f38e363b36721d9014ba27ed873ec563f2 (diff) | |
| download | u-boot-e2572b55440fefa109dc2301228e2d6cc1cca229.tar.gz | |
xilinx: common: Do not save fdt_blob to bss section
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | board/xilinx/common/board.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index eab389d049..b0f60c40a5 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -44,7 +44,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) void *board_fdt_blob_setup(void) { - static void *fdt_blob; + void *fdt_blob; #if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR) fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR; |