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authorSimon Glass <sjg@chromium.org>2023-05-09 18:13:47 +0800
committerBin Meng <bmeng@tinylab.org>2023-05-11 10:25:29 +0800
commit6624392d3bb633fe91b7cc4b75b6eec28f637f72 (patch)
tree93e539468c4897944a093fd9cfc8c2416b020d9b
parent3d0f885a2adc9320a01a905a9deaa06d51614d92 (diff)
downloadu-boot-6624392d3bb633fe91b7cc4b75b6eec28f637f72.tar.gz
x86: sysreset: Set up LPC only after relocation
Probing LPC can cause PCI enumeration to take place, which significantly increases pre-relocation memory usage. Also, LPC is somtimes enabled directly by SPL. Adjust the logic to probe the LPC only after relocation. This allows chromebook_link64 to start up without a much larger CONFIG_SYS_MALLOC_F_LEN value. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--drivers/sysreset/sysreset_x86.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
index 8042f3994f..4936fdb76c 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -129,8 +129,13 @@ static int x86_sysreset_probe(struct udevice *dev)
{
struct x86_sysreset_plat *plat = dev_get_plat(dev);
- /* Locate the PCH if there is one. It isn't essential */
- uclass_first_device(UCLASS_PCH, &plat->pch);
+ /*
+ * Locate the PCH if there is one. It isn't essential. Avoid this before
+ * relocation as we shouldn't need reset then and it needs a lot of
+ * memory for PCI enumeration.
+ */
+ if (gd->flags & GD_FLG_RELOC)
+ uclass_first_device(UCLASS_PCH, &plat->pch);
return 0;
}