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authorTom Warren <twarren@nvidia.com>2019-11-12 13:17:37 -0700
committerTom Warren <twarren@nvidia.com>2020-04-02 14:30:02 -0700
commit3c8cf240322e76eebbb31593c96f0754092df91f (patch)
treee4b31b8a70b0bc995fd90e31195cb50f2b0c9a39
parenta482f32992230d8bdae2caa72056ab7d9208d5f0 (diff)
downloadu-boot-3c8cf240322e76eebbb31593c96f0754092df91f.tar.gz
qspi: t210: Fix claim_bus's use of the wrong bus/device
claim_bus() is passed a udevice *dev, which is the bus device's parent. In this driver, claim_bus assumed it was the bus, which caused the 'priv' info pointer to be wrong, and periph_id was incorrect. This in turn caused the periph clock call to assign the wrong clock (PLLM instead of PLLP0), which caused a kernel warning. I only saw the 'bad' periph_id when enabling DEBUG due to an assert. Not sure how QSPI was working w/this errant clock, but it was moot as QSPI wasn't active unless you probed it, and that wasn't happening until I posted a patch to enable env save to QSPI for Nano (coming soon). Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--drivers/spi/tegra210_qspi.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c
index d82ecaa61f..2a77126d04 100644
--- a/drivers/spi/tegra210_qspi.c
+++ b/drivers/spi/tegra210_qspi.c
@@ -2,7 +2,8 @@
/*
* NVIDIA Tegra210 QSPI controller driver
*
- * (C) Copyright 2015 NVIDIA Corporation <www.nvidia.com>
+ * (C) Copyright 2015-2019 NVIDIA Corporation <www.nvidia.com>
+ *
*/
#include <common.h>
@@ -137,8 +138,9 @@ static int tegra210_qspi_probe(struct udevice *bus)
return 0;
}
-static int tegra210_qspi_claim_bus(struct udevice *bus)
+static int tegra210_qspi_claim_bus(struct udevice *dev)
{
+ struct udevice *bus = dev->parent;
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
struct qspi_regs *regs = priv->regs;