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authorTom Rini <trini@konsulko.com>2020-06-09 12:17:35 -0400
committerTom Rini <trini@konsulko.com>2020-06-09 17:30:47 -0400
commit13eea81a48683a48fa118424f13407a2d6f26490 (patch)
treec339ebea14e4c014b2874b57315cdc59e7e2fd14
parent7de2d10cbef33712debd4366b64186d7d3d24823 (diff)
downloadu-boot-13eea81a48683a48fa118424f13407a2d6f26490.tar.gz
Convert CONFIG_ATMEL_NAND_HW_PMECC et al to Kconfig
This converts the following to Kconfig: CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_NAND_HWECC CONFIG_NAND_ATMEL CONFIG_PMECC_CAP CONFIG_PMECC_SECTOR_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--configs/sam9x60ek_nandflash_defconfig4
-rw-r--r--configs/sam9x60ek_qspiflash_defconfig4
-rw-r--r--include/configs/sam9x60ek.h7
3 files changed, 8 insertions, 7 deletions
diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig
index b59e4be4be..d09f78828f 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -50,6 +50,10 @@ CONFIG_MICROCHIP_FLEXCOM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
+CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
+CONFIG_PMECC_CAP=8
CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig
index 37de4044e9..6c4f534974 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -60,6 +60,10 @@ CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
+CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
+CONFIG_PMECC_CAP=8
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h
index 9b439a6441..19714402ca 100644
--- a/include/configs/sam9x60ek.h
+++ b/include/configs/sam9x60ek.h
@@ -44,7 +44,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_MASK_ALE BIT(21)
@@ -54,12 +53,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
#endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP 8
-#define CONFIG_PMECC_SECTOR_SIZE 512
-
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#ifdef CONFIG_SD_BOOT