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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2021-03-22 08:20:00 -0500 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-04-09 11:59:13 +0200 |
| commit | bbe10c70a2f4f055410c857c5a54625bf53ce70c (patch) | |
| tree | 4ea469be228a58a702c67d15157e87dcf28ad72f | |
| parent | 99e1191845981c931db6a54022bcfdb9e87c3ca7 (diff) | |
| download | u-boot-bbe10c70a2f4f055410c857c5a54625bf53ce70c.tar.gz | |
configs: stm32mp1: Remove misleading CONFIG_SPL_BSS_START_ADDR
CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts.
stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds,
which does not make use of this definition.
The SPL BSS starts in SRAM, right after .text, .rodata, .data, and
.u_boot_list. A very short version of the STM32MP1 memory map is:
* SYSRAM: 2ffc0000 - 30000000 <- all of SPL is here
* DRAM: c0000000+
0xC0200000 is a DRAM address, and has nothing to do with SPL. It is
just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to
have it at all.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| -rw-r--r-- | include/configs/stm32mp1.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 7fdb3ffce4..56a70cb584 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -50,7 +50,6 @@ /* SPL support */ #ifdef CONFIG_SPL /* SPL use DDR */ -#define CONFIG_SPL_BSS_START_ADDR 0xC0200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0xC0300000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x01D00000 |