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| author | Simon South <simon@simonsouth.net> | 2019-10-06 12:28:14 -0400 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-10-26 16:05:02 +0800 |
| commit | 4137f2122a6c252cb8b76fa0eceef93661e85145 (patch) | |
| tree | 46243f758d8530b149861a318fab689889e4b624 | |
| parent | 678be9a27911cecde5649e6fcf15bcdf6d9435eb (diff) | |
| download | u-boot-4137f2122a6c252cb8b76fa0eceef93661e85145.tar.gz | |
ram: rk3328: Fix loading of skew values
Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3328.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 0541bbadf0..e84c9be6a2 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram, copy_to_reg(PHY_REG(phy_base, 0x70), &sdram_params->skew.cs0_dm0_skew[0], 44 * 4); copy_to_reg(PHY_REG(phy_base, 0xc0), - &sdram_params->skew.cs0_dm1_skew[0], 44 * 4); + &sdram_params->skew.cs1_dm0_skew[0], 44 * 4); } static int update_refresh_reg(struct dram_info *dram) |