diff options
author | Sam Shih <sam.shih@mediatek.com> | 2020-01-10 16:30:30 +0800 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-01-15 19:50:31 -0500 |
commit | f6a4ecf7d2a1645ee47c04ee9051430598b1c245 (patch) | |
tree | 09f1b635863d90d172c9f6eccb27427a1aa13e37 | |
parent | 317e6dc81813577aea4f28acc5e20cd38399d42c (diff) | |
download | u-boot-f6a4ecf7d2a1645ee47c04ee9051430598b1c245.tar.gz |
clk: mediatek: fix clock-rate overflow problem
This patch fix clock-rate overflow problem in mediatek
clock driver common part.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
-rw-r--r-- | drivers/clk/mediatek/clk-mtk.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 334559161e..09ae2d4860 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -39,7 +39,7 @@ * this function is recursively called to find the parent to calculate * the accurate frequency. */ -static int mtk_clk_find_parent_rate(struct clk *clk, int id, +static ulong mtk_clk_find_parent_rate(struct clk *clk, int id, const struct driver *drv) { struct clk parent = { .id = id, }; @@ -285,7 +285,7 @@ static ulong mtk_factor_recalc_rate(const struct mtk_fixed_factor *fdiv, return rate; } -static int mtk_topckgen_get_factor_rate(struct clk *clk, u32 off) +static ulong mtk_topckgen_get_factor_rate(struct clk *clk, u32 off) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_fixed_factor *fdiv = &priv->tree->fdivs[off]; @@ -307,7 +307,7 @@ static int mtk_topckgen_get_factor_rate(struct clk *clk, u32 off) return mtk_factor_recalc_rate(fdiv, rate); } -static int mtk_topckgen_get_mux_rate(struct clk *clk, u32 off) +static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_composite *mux = &priv->tree->muxes[off]; |