diff options
| author | Andreas Dannenberg <dannenberg@ti.com> | 2019-06-13 10:29:44 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-07-26 21:49:26 -0400 |
| commit | b73fcbced9dfa1345ffcafbcfd84dfad7c291915 (patch) | |
| tree | 03392c4930b41f71ae1256e62226026c03b6ded6 | |
| parent | 0a704924f3725cbf1dffe88f94252a22ccc7af12 (diff) | |
| download | u-boot-b73fcbced9dfa1345ffcafbcfd84dfad7c291915.tar.gz | |
armv7R: K3: j721e: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MCU and MAIN
domains. We may want to go back later and limit the unlocking that's
being done.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
| -rw-r--r-- | arch/arm/mach-k3/j721e_init.c | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 80e88dd185..ba6a1cf0e6 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -14,14 +14,55 @@ #include "common.h" #ifdef CONFIG_SPL_BUILD +static void mmr_unlock(u32 base, u32 partition) +{ + /* Translate the base address */ + phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE; + + /* Unlock the requested partition if locked using two-step sequence */ + writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0); + writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1); +} + +static void ctrl_mmr_unlock(void) +{ + /* Unlock all WKUP_CTRL_MMR0 module registers */ + mmr_unlock(WKUP_CTRL_MMR0_BASE, 0); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 1); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 2); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 3); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 4); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 6); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 7); + + /* Unlock all MCU_CTRL_MMR0 module registers */ + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); + mmr_unlock(MCU_CTRL_MMR0_BASE, 3); + mmr_unlock(MCU_CTRL_MMR0_BASE, 4); + + /* Unlock all CTRL_MMR0 module registers */ + mmr_unlock(CTRL_MMR0_BASE, 0); + mmr_unlock(CTRL_MMR0_BASE, 1); + mmr_unlock(CTRL_MMR0_BASE, 2); + mmr_unlock(CTRL_MMR0_BASE, 3); + mmr_unlock(CTRL_MMR0_BASE, 4); + mmr_unlock(CTRL_MMR0_BASE, 5); + mmr_unlock(CTRL_MMR0_BASE, 6); + mmr_unlock(CTRL_MMR0_BASE, 7); +} + void board_init_f(ulong dummy) { /* * ToDo: * - Store boot rom index. - * - unlock mmr. */ + /* Make all control module registers accessible */ + ctrl_mmr_unlock(); + #ifdef CONFIG_CPU_V7R setup_k3_mpu_regions(); #endif |