diff options
author | Simon Glass <sjg@chromium.org> | 2017-03-28 10:27:21 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2017-04-05 13:52:51 -0400 |
commit | 26345552d65f9891879d62b0b0a427716f0e662b (patch) | |
tree | 4c8ce8e38164fd812d1504b590493b5211d2003d | |
parent | d593c61672eb0fe21380750b3b1a816cea9f86bd (diff) | |
download | u-boot-26345552d65f9891879d62b0b0a427716f0e662b.tar.gz |
board_f: Remove sdram_adjust_866() from the init sequence
We can just call this from the only function that needs it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | arch/powerpc/cpu/mpc8xx/speed.c | 32 | ||||
-rw-r--r-- | common/board_f.c | 2 | ||||
-rw-r--r-- | include/common.h | 1 |
3 files changed, 16 insertions, 19 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c index 613209cc6d..7a532cca07 100644 --- a/arch/powerpc/cpu/mpc8xx/speed.c +++ b/arch/powerpc/cpu/mpc8xx/speed.c @@ -237,6 +237,21 @@ int get_clocks (void) static long init_pll_866 (long clk); +/* Adjust sdram refresh rate to actual CPU clock. + */ +static int sdram_adjust_866(void) +{ + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; + long mamr; + + mamr = immr->im_memctl.memc_mamr; + mamr &= ~MAMR_PTA_MSK; + mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT); + immr->im_memctl.memc_mamr = mamr; + + return 0; +} + /* This function sets up PLL (init_pll_866() is called) and * fills gd->cpu_clk and gd->bus_clk according to the environment * variable 'cpuclk' or to CONFIG_8xx_CPUCLK_DEFAULT (if 'cpuclk' @@ -278,22 +293,7 @@ int get_clocks(void) } immr->im_clkrst.car_sccr = sccr_reg; - return (0); -} - -/* Adjust sdram refresh rate to actual CPU clock. - */ -int sdram_adjust_866 (void) -{ - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - long mamr; - - mamr = immr->im_memctl.memc_mamr; - mamr &= ~MAMR_PTA_MSK; - mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT); - immr->im_memctl.memc_mamr = mamr; - - return (0); + return sdram_adjust_866(); } /* Configure PLL for MPC866/859/885 CPU series diff --git a/common/board_f.c b/common/board_f.c index 84ffc90d5a..4b5ef1fae3 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -832,8 +832,6 @@ static const init_fnc_t init_sequence_f[] = { #if defined(CONFIG_8xx_CPUCLK_DEFAULT) /* get CPU and bus clocks according to the environment variable */ get_clocks, - /* adjust sdram refresh rate according to the new clock */ - sdram_adjust_866, init_timebase, #elif defined(CONFIG_PPC) get_clocks, /* get CPU and bus clocks (etc.) */ diff --git a/include/common.h b/include/common.h index ad8c18cd6a..6e359904b0 100644 --- a/include/common.h +++ b/include/common.h @@ -637,7 +637,6 @@ int serial_stub_tstc(struct stdio_dev *sdev); /* $(CPU)/speed.c */ int get_clocks (void); -int sdram_adjust_866 (void); int adjust_sdram_tbs_8xx (void); #if defined(CONFIG_MPC8260) int prt_8260_clks (void); |