diff options
author | Tom Rini <trini@konsulko.com> | 2020-04-09 19:23:48 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-04-09 19:23:48 -0400 |
commit | a7ae587f9325aa072617dae109d474f623b38a3e (patch) | |
tree | df5fa02d7a67a07c6e833f9175998045391ac813 | |
parent | 31232de07ef2bd97ff67625976eecd97eeb1bd3d (diff) | |
parent | fb9acad30562177287d8cffec19e5dfa6f072de7 (diff) | |
download | u-boot-WIP/09Apr2020.tar.gz |
Merge tag 'mips-fixes-for-2020.04' of git://git.denx.de/u-boot-mipsWIP/09Apr2020
- doc: fix code examples in qemu-mips.rst
- mips: vcoreiii: fix memtest and cache coherency issues
- cmd/go: fix cache coherency issues on MIPS
-rw-r--r-- | arch/mips/cpu/time.c | 2 | ||||
-rw-r--r-- | arch/mips/lib/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/lib/boot.c | 23 | ||||
-rw-r--r-- | arch/mips/lib/cache.c | 2 | ||||
-rw-r--r-- | arch/mips/mach-mscc/cpu.c | 9 | ||||
-rw-r--r-- | arch/mips/mach-mscc/dram.c | 14 | ||||
-rw-r--r-- | arch/mips/mach-mscc/include/mach/ddr.h | 4 | ||||
-rw-r--r-- | arch/mips/mach-mscc/lowlevel_init.S | 17 | ||||
-rw-r--r-- | doc/board/emulation/qemu-mips.rst | 108 | ||||
-rw-r--r-- | include/configs/vcoreiii.h | 3 |
10 files changed, 114 insertions, 69 deletions
diff --git a/arch/mips/cpu/time.c b/arch/mips/cpu/time.c index a1508e3b88..e0c1868b8c 100644 --- a/arch/mips/cpu/time.c +++ b/arch/mips/cpu/time.c @@ -13,7 +13,7 @@ unsigned long notrace timer_read_counter(void) return read_c0_count(); } -ulong notrace get_tbclk(void) +ulong notrace __weak get_tbclk(void) { return CONFIG_SYS_MIPS_TIMER_FREQ; } diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 589bc651f9..24a72d9c97 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -11,5 +11,6 @@ obj-y += stack.o obj-y += traps.o obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_GO) += boot.o lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c new file mode 100644 index 0000000000..db862f6379 --- /dev/null +++ b/arch/mips/lib/boot.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Stefan Roese <sr@denx.de> + */ + +#include <common.h> +#include <command.h> +#include <cpu_func.h> + +DECLARE_GLOBAL_DATA_PTR; + +unsigned long do_go_exec(ulong (*entry)(int, char * const []), + int argc, char * const argv[]) +{ + /* + * Flush cache before jumping to application. Let's flush the + * whole SDRAM area, since we don't know the size of the image + * that was loaded. + */ + flush_cache(gd->bd->bi_memstart, gd->ram_top - gd->bd->bi_memstart); + + return entry(argc, argv); +} diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index 502956d050..1a8c87d094 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -141,7 +141,7 @@ ops_done: instruction_hazard_barrier(); } -void flush_dcache_range(ulong start_addr, ulong stop) +void __weak flush_dcache_range(ulong start_addr, ulong stop) { unsigned long lsize = dcache_line_size(); unsigned long slsize = scache_line_size(); diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c index ac75d51da5..3ee589891b 100644 --- a/arch/mips/mach-mscc/cpu.c +++ b/arch/mips/mach-mscc/cpu.c @@ -7,6 +7,7 @@ #include <asm/io.h> #include <asm/types.h> +#include <asm/mipsregs.h> #include <mach/tlb.h> #include <mach/ddr.h> @@ -53,7 +54,6 @@ void vcoreiii_tlb_init(void) MMU_REGIO_RW); #endif -#if CONFIG_SYS_TEXT_BASE == MSCC_FLASH_TO /* * If U-Boot is located in NOR then we want to be able to use * the data cache in order to boot in a decent duration @@ -71,9 +71,10 @@ void vcoreiii_tlb_init(void) create_tlb(tlbix++, MSCC_DDR_TO, MSCC_RAM_TLB_SIZE, MMU_REGIO_RW, MSCC_ATTRIB2); - /* Enable caches by clearing the bit ERL, which is set on reset */ - write_c0_status(read_c0_status() & ~BIT(2)); -#endif /* CONFIG_SYS_TEXT_BASE */ + /* Enable mapping (using TLB) kuseg by clearing the bit ERL, + * which is set on reset. + */ + write_c0_status(read_c0_status() & ~ST0_ERL); } int mach_cpu_init(void) diff --git a/arch/mips/mach-mscc/dram.c b/arch/mips/mach-mscc/dram.c index c43f7a585b..72c70c9e84 100644 --- a/arch/mips/mach-mscc/dram.c +++ b/arch/mips/mach-mscc/dram.c @@ -31,7 +31,7 @@ static inline int vcoreiii_train_bytelane(void) int vcoreiii_ddr_init(void) { - int res; + register int res; if (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT) & ICPU_MEMCTRL_STAT_INIT_DONE)) { @@ -40,20 +40,19 @@ int vcoreiii_ddr_init(void) if (hal_vcoreiii_init_dqs() || vcoreiii_train_bytelane()) hal_vcoreiii_ddr_failed(); } -#if (CONFIG_SYS_TEXT_BASE != 0x20000000) + res = dram_check(); if (res == 0) hal_vcoreiii_ddr_verified(); else hal_vcoreiii_ddr_failed(); - /* Clear boot-mode and read-back to activate/verify */ + /* Remap DDR to kuseg: Clear boot-mode */ clrbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, ICPU_GENERAL_CTRL_BOOT_MODE_ENA); + /* - and read-back to activate/verify */ readl(BASE_CFG + ICPU_GENERAL_CTRL); -#else - res = 0; -#endif + return res; } @@ -66,9 +65,6 @@ int print_cpuinfo(void) int dram_init(void) { - while (vcoreiii_ddr_init()) - ; - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; return 0; } diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h index d1f4287f65..bf75e52ec3 100644 --- a/arch/mips/mach-mscc/include/mach/ddr.h +++ b/arch/mips/mach-mscc/include/mach/ddr.h @@ -435,16 +435,12 @@ static inline void hal_vcoreiii_ddr_failed(void) reset = KSEG0ADDR(_machine_restart); icache_lock((void *)reset, 128); asm volatile ("jr %0"::"r" (reset)); - - panic("DDR init failed\n"); } #else /* JR2 || ServalT */ static inline void hal_vcoreiii_ddr_failed(void) { writel(0, BASE_CFG + ICPU_RESET); writel(PERF_SOFT_RST_SOFT_CHIP_RST, BASE_CFG + PERF_SOFT_RST); - - panic("DDR init failed\n"); } #endif diff --git a/arch/mips/mach-mscc/lowlevel_init.S b/arch/mips/mach-mscc/lowlevel_init.S index dfbe06766c..91f29ae252 100644 --- a/arch/mips/mach-mscc/lowlevel_init.S +++ b/arch/mips/mach-mscc/lowlevel_init.S @@ -8,6 +8,7 @@ .set noreorder .extern vcoreiii_tlb_init + .extern vcoreiii_ddr_init #ifdef CONFIG_SOC_LUTON .extern pll_init #endif @@ -17,14 +18,28 @@ LEAF(lowlevel_init) * As we have no stack yet, we can assume the restricted * luxury of the sX-registers without saving them */ - move s0,ra + + /* Modify ra/s0 such we return to physical NOR location */ + li t0, 0x0fffffff + li t1, CONFIG_SYS_TEXT_BASE + and s0, ra, t0 + add s0, s0, t1 jal vcoreiii_tlb_init nop + #ifdef CONFIG_SOC_LUTON jal pll_init nop #endif + + /* Initialize DDR controller to enable stack/gd/heap */ +0: + jal vcoreiii_ddr_init + nop + bnez v0, 0b /* Retry on error */ + nop + jr s0 nop END(lowlevel_init) diff --git a/doc/board/emulation/qemu-mips.rst b/doc/board/emulation/qemu-mips.rst index 529a908b55..f206039f54 100644 --- a/doc/board/emulation/qemu-mips.rst +++ b/doc/board/emulation/qemu-mips.rst @@ -25,37 +25,45 @@ Example usage Using u-boot.bin as ROM (replaces Qemu monitor): -32 bit, big endian:: +32 bit, big endian - # make qemu_mips - # qemu-system-mips -M mips -bios u-boot.bin -nographic +.. code-block:: bash -32 bit, little endian:: + make qemu_mips + qemu-system-mips -M mips -bios u-boot.bin -nographic - # make qemu_mipsel - # qemu-system-mipsel -M mips -bios u-boot.bin -nographic +32 bit, little endian -64 bit, big endian:: +.. code-block:: bash - # make qemu_mips64 - # qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic + make qemu_mipsel + qemu-system-mipsel -M mips -bios u-boot.bin -nographic -64 bit, little endian:: +64 bit, big endian - # make qemu_mips64el - # qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic +.. code-block:: bash + + make qemu_mips64 + qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic + +64 bit, little endian + +.. code-block:: bash + + make qemu_mips64el + qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic or using u-boot.bin from emulated flash: -if you use a qemu version after commit 4224 +if you use a QEMU version after commit 4224 -.. code-block:: none +.. code-block:: bash - create image: - # dd of=flash bs=1k count=4k if=/dev/zero - # dd of=flash bs=1k conv=notrunc if=u-boot.bin - start it (see above): - # qemu-system-mips[64][el] [-cpu MIPS64R2-generic] -M mips -pflash flash -nographic + # create image: + dd of=flash bs=1k count=4k if=/dev/zero + dd of=flash bs=1k conv=notrunc if=u-boot.bin + # start it (see above): + qemu-system-mips[64][el] [-cpu MIPS64R2-generic] -M mips -pflash flash -nographic Download kernel + initrd ^^^^^^^^^^^^^^^^^^^^^^^^ @@ -75,61 +83,63 @@ you can downland:: Generate uImage ^^^^^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash - # tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage + tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage Copy uImage to Flash ^^^^^^^^^^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash - # dd if=uImage bs=1k conv=notrunc seek=224 of=flash + dd if=uImage bs=1k conv=notrunc seek=224 of=flash Generate Ide Disk ^^^^^^^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash - # dd of=ide bs=1k cout=100k if=/dev/zero + dd of=ide bs=1k count=100k if=/dev/zero - # sfdisk -C 261 -d ide - # partition table of ide + # Create partion table + sudo sfdisk ide << EOF + label: dos + label-id: 0x6fe3a999 + device: image unit: sectors - - ide1 : start= 63, size= 32067, Id=83 - ide2 : start= 32130, size= 32130, Id=83 - ide3 : start= 64260, size= 4128705, Id=83 - ide4 : start= 0, size= 0, Id= 0 + image1 : start= 63, size= 32067, Id=83 + image2 : start= 32130, size= 32130, Id=83 + image3 : start= 64260, size= 4128705, Id=83 + EOF Copy to ide ^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash - # dd if=uImage bs=512 conv=notrunc seek=63 of=ide + dd if=uImage bs=512 conv=notrunc seek=63 of=ide Generate ext2 on part 2 on Copy uImage and initrd.gz ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash # Attached as loop device ide offset = 32130 * 512 - # losetup -o 16450560 -f ide + sudo losetup -o 16450560 /dev/loop0 ide # Format as ext2 ( arg2 : nb blocks) - # mke2fs /dev/loop0 16065 - # losetup -d /dev/loop0 + sudo mkfs.ext2 /dev/loop0 16065 + sudo losetup -d /dev/loop0 # Mount and copy uImage and initrd.gz to it - # mount -o loop,offset=16450560 -t ext2 ide /mnt - # mkdir /mnt/boot - # cp {initrd.gz,uImage} /mnt/boot/ + sudo mount -o loop,offset=16450560 -t ext2 ide /mnt + sudo mkdir /mnt/boot + cp {initrd.gz,uImage} /mnt/boot/ # Umount it - # umount /mnt + sudo umount /mnt Set Environment ^^^^^^^^^^^^^^^ -.. code-block:: none +.. code-block:: bash setenv rd_start 0x80800000 setenv rd_size 2663940 @@ -157,9 +167,11 @@ Set Environment setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}' setenv bootcmd 'run boot_tftp_flash' -Now you can boot from flash, ide, ide+ext2 and tfp:: +Now you can boot from flash, ide, ide+ext2 and tfp + +.. code-block:: bash - # qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide + qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide How to debug U-Boot @@ -168,9 +180,9 @@ How to debug U-Boot In order to debug U-Boot you need to start qemu with gdb server support (-s) and waiting the connection to start the CPU (-S) -.. code-block:: none +.. code-block:: bash - # qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide + qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide in an other console you start gdb @@ -182,7 +194,7 @@ by connecting to the gdb server localhost:1234 .. code-block:: none - # mipsel-unknown-linux-gnu-gdb u-boot + $ mipsel-unknown-linux-gnu-gdb u-boot GNU gdb 6.6 Copyright (C) 2006 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index e69456ef7c..6a2f80c2fb 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -39,7 +39,8 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - SZ_4M) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |