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authorMichael Kurz <michi.kurz@gmail.com>2017-01-22 16:04:25 +0100
committerTom Rini <trini@konsulko.com>2017-01-28 14:04:44 -0500
commitdd3f0ebfb78f007c9fae38d9c20e58b9cbd6b3ce (patch)
treefd24eac0460961fd394f69c4a29096f9375cf400
parentbad5188be2e9ef233d581a00b0dc2c8e6487b50d (diff)
downloadu-boot-dd3f0ebfb78f007c9fae38d9c20e58b9cbd6b3ce.tar.gz
ARM: stm32: fix stm32f7 sdram fmc base address
The fmc base address is defined twice, once in fmc.h and once in stm32.h. Fix wrong definition in stm32.h. Remove the definiton in fmc.h. Signed-off-by: Michael Kurz <michi.kurz@gmail.com> Acked-by: Vikas Manocha <vikas.manocha@st.com>
-rw-r--r--arch/arm/include/asm/arch-stm32f7/fmc.h3
-rw-r--r--arch/arm/include/asm/arch-stm32f7/stm32.h2
2 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-stm32f7/fmc.h b/arch/arm/include/asm/arch-stm32f7/fmc.h
index d61a86fcf1..4741e5a0a3 100644
--- a/arch/arm/include/asm/arch-stm32f7/fmc.h
+++ b/arch/arm/include/asm/arch-stm32f7/fmc.h
@@ -24,8 +24,7 @@ struct stm32_fmc_regs {
/*
* FMC registers base
*/
-#define STM32_SDRAM_FMC_BASE 0xA0000140
-#define STM32_SDRAM_FMC ((struct stm32_fmc_regs *)STM32_SDRAM_FMC_BASE)
+#define STM32_SDRAM_FMC ((struct stm32_fmc_regs *)SDRAM_FMC_BASE)
/* Control register SDCR */
#define FMC_SDCR_RPIPE_SHIFT 13 /* RPIPE bit shift */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index a425178bc0..14e3398768 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -49,7 +49,7 @@
#define FLASH_CNTL_BASE (AHB1_PERIPH_BASE + 0x3C00)
-#define SDRAM_FMC_BASE (AHB3_PERIPH_BASE + 0x4A0000140)
+#define SDRAM_FMC_BASE (AHB3_PERIPH_BASE + 0x40000140)
static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
[0 ... 3] = 32 * 1024,