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author | Soeren Moch <smoch@web.de> | 2019-03-01 13:10:59 +0100 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2019-04-13 20:30:09 +0200 |
commit | 046a69b84808ed86a59bb32a970da912c1e78c94 (patch) | |
tree | 9c57523c2937769f10eb1768fffdd362ea73a256 | |
parent | d5326dfa7a757794c5a4865fba6b899e280a022b (diff) | |
download | u-boot-046a69b84808ed86a59bb32a970da912c1e78c94.tar.gz |
ata: dwc_ahsata: Add ahci driver model support
Disable this support for cm_fx6 to avoid breakage.
Signed-off-by: Soeren Moch <smoch@web.de>
-rw-r--r-- | configs/cm_fx6_defconfig | 1 | ||||
-rw-r--r-- | drivers/ata/Kconfig | 8 | ||||
-rw-r--r-- | drivers/ata/dwc_ahsata.c | 24 |
3 files changed, 33 insertions, 0 deletions
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 6156ac2bee..2178170c5a 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -51,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y +# CONFIG_DWC_AHSATA_AHCI is not set CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 7ebee75c0a..593e9cbc1f 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -66,6 +66,14 @@ config DWC_AHSATA Enable this driver to support the DWC AHSATA SATA controller found in i.MX5 and i.MX6 SoCs. +config DWC_AHSATA_AHCI + bool "Enable DWC AHSATA AHCI driver support" + depends on DWC_AHSATA + depends on AHCI + default y + help + Enable this option unless you need your private ahci implementation + config FSL_SATA bool "Enable Freescale SATA controller driver support" select LIBATA diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index 6fe5641dd9..afced8e7e3 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -16,6 +16,7 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> +#include <asm/mach-imx/sata.h> #include <linux/bitops.h> #include <linux/ctype.h> #include <linux/errno.h> @@ -1020,6 +1021,9 @@ int dwc_ahsata_probe(struct udevice *dev) struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev); int ret; +#if defined(CONFIG_MX6) + setup_sata(); +#endif uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI; uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev); @@ -1067,4 +1071,24 @@ U_BOOT_DRIVER(dwc_ahsata_blk) = { .ops = &dwc_ahsata_blk_ops, }; +#if CONFIG_IS_ENABLED(DWC_AHSATA_AHCI) +struct ahci_ops dwc_ahsata_ahci_ops = { + .port_status = dwc_ahsata_port_status, + .reset = dwc_ahsata_bus_reset, + .scan = dwc_ahsata_scan, +}; + +static const struct udevice_id dwc_ahsata_ahci_ids[] = { + { .compatible = "fsl,imx6q-ahci" }, + { } +}; + +U_BOOT_DRIVER(dwc_ahsata_ahci) = { + .name = "dwc_ahsata_ahci", + .id = UCLASS_AHCI, + .of_match = dwc_ahsata_ahci_ids, + .ops = &dwc_ahsata_ahci_ops, + .probe = dwc_ahsata_probe, +}; +#endif #endif |