diff options
| author | Tom Rini <trini@konsulko.com> | 2019-05-19 09:36:48 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-19 09:36:48 -0400 |
| commit | d3d212b6240f75006c18e4c59b3b28d81eedb7d3 (patch) | |
| tree | 106781344a5074a0e1cc26e8e371016cef0d0570 | |
| parent | 98b3156b0df4b0df9cb3a0bbfc240d0c4edd2638 (diff) | |
| parent | 612f6b223d2cb03ae0170d3eadcb78f7b473ecfb (diff) | |
| download | u-boot-d3d212b6240f75006c18e4c59b3b28d81eedb7d3.tar.gz | |
Merge branch '2019-05-19-master-imports'
- Convert SYS_[DI]CACHE_OFF to Kconfig, introduce SPL variant.
- Various bcm96* fixes.
- Import include/android_bootloader_message.h from AOSP
- Assorted other small fixes.
208 files changed, 639 insertions, 224 deletions
@@ -278,7 +278,7 @@ config FIT if FIT config FIT_EXTERNAL_OFFSET - hex "Text Base" + hex "FIT external data offset" default 0x0 help This specifies a data offset in fit image. @@ -1071,7 +1071,7 @@ ifneq ($(EXT_DTB),) u-boot-fit-dtb.bin: u-boot-nodtb.bin $(EXT_DTB) $(call if_changed,cat) else -u-boot-fit-dtb.bin: u-boot-nodtb.bin $(FINAL_DTB_CONTAINER) +u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob $(FINAL_DTB_CONTAINER) $(call if_changed,cat) endif @@ -634,8 +634,6 @@ The following options need to be configured: the defaults discussed just above. - Cache Configuration: - CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot - CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot - Cache Configuration for ARM: diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 50369d5983..0cb97207db 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -109,12 +109,30 @@ config CPU_BIG_ENDIAN Build kernel for Big Endian Mode of ARC CPU config SYS_ICACHE_OFF - bool "Do not use Instruction Cache" + bool "Do not enable icache" default n + help + Do not enable instruction cache in U-Boot. + +config SPL_SYS_ICACHE_OFF + bool "Do not enable icache in SPL" + depends on SPL + default SYS_ICACHE_OFF + help + Do not enable instruction cache in SPL. config SYS_DCACHE_OFF - bool "Do not use Data Cache" + bool "Do not enable dcache" default n + help + Do not enable data cache in U-Boot. + +config SPL_SYS_DCACHE_OFF + bool "Do not enable dcache in SPL" + depends on SPL + default SYS_DCACHE_OFF + help + Do not enable data cache in SPL. menuconfig ARC_DBG bool "ARC debugging" diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index 84959b41bd..8c744f5be7 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -16,7 +16,7 @@ ENTRY(_start) lr r5, [ARC_BCR_IC_BUILD] breq r5, 0, 1f ; I$ doesn't exist lr r5, [ARC_AUX_IC_CTRL] -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) bclr r5, r5, 0 ; 0 - Enable, 1 is Disable #else bset r5, r5, 0 ; I$ exists, but is not used @@ -37,7 +37,7 @@ ENTRY(_start) breq r5, 0, 1f ; D$ doesn't exist lr r5, [ARC_AUX_DC_CTRL] bclr r5, r5, 6 ; Invalidate (discard w/o wback) -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) bclr r5, r5, 0 ; Enable (+Inv) #else bset r5, r5, 0 ; Disable (+Inv) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3c4af1f299..00be3d1721 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -74,6 +74,32 @@ config ARM_ASM_UNIFIED config THUMB2_KERNEL bool +config SYS_ICACHE_OFF + bool "Do not enable icache" + default n + help + Do not enable instruction cache in U-Boot. + +config SPL_SYS_ICACHE_OFF + bool "Do not enable icache in SPL" + depends on SPL + default SYS_ICACHE_OFF + help + Do not enable instruction cache in SPL. + +config SYS_DCACHE_OFF + bool "Do not enable dcache" + default n + help + Do not enable data cache in U-Boot. + +config SPL_SYS_DCACHE_OFF + bool "Do not enable dcache in SPL" + depends on SPL + default SYS_DCACHE_OFF + help + Do not enable data cache in SPL. + config SYS_ARM_CACHE_CP15 bool "CP15 based cache enabling support" help diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 41feeefec1..8aee1539a9 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -51,7 +51,7 @@ static void cache_flush(void) asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i)); } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void invalidate_dcache_all(void) { asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0)); @@ -87,7 +87,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop) asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); } -#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ void invalidate_dcache_all(void) { } @@ -95,15 +95,15 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } -#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ -#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) void enable_caches(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) dcache_enable(); #endif } diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 22a55f52e0..16eea693d1 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -6,7 +6,7 @@ #include <linux/types.h> #include <common.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void invalidate_dcache_all(void) { asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); @@ -46,7 +46,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop) asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0)); } -#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ void invalidate_dcache_all(void) { } @@ -54,7 +54,7 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } -#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ /* * Stub implementations for l2 cache operations @@ -66,7 +66,7 @@ __weak void l2_cache_disable(void) {} __weak void invalidate_l2_cache(void) {} #endif -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) /* Invalidate entire I-cache and branch predictor array */ void invalidate_icache_all(void) { @@ -80,10 +80,10 @@ void invalidate_icache_all(void) {} void enable_caches(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) dcache_enable(); #endif } diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c index c3f1ee1fd1..d7cffe8b69 100644 --- a/arch/arm/cpu/arm926ejs/cpu.c +++ b/arch/arm/cpu/arm926ejs/cpu.c @@ -44,7 +44,7 @@ int cleanup_before_linux (void) /* flush I/D-cache */ static void cache_flush (void) { -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) unsigned long i = 0; asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 1045673292..ff592ba810 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -84,7 +84,7 @@ flush_dcache: /* * disable MMU and D cache - * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined + * enable I cache if SYS_ICACHE_OFF is not defined */ mrc p15, 0, r0, c1, c0, 0 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */ @@ -95,7 +95,7 @@ flush_dcache: bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */ #endif orr r0, r0, #0x00000002 /* set bit 1 (A) Align */ -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ #endif mcr p15, 0, r0, c1, c0, 0 diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 99484c2636..0dc4ebf694 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -12,7 +12,7 @@ #define ARMV7_DCACHE_INVAL_RANGE 1 #define ARMV7_DCACHE_CLEAN_INVAL_RANGE 2 -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) /* Asm functions from cache_v7_asm.S */ void v7_flush_dcache_all(void); @@ -149,7 +149,7 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop) flush_dcache_range(start, stop); v7_inval_tlb(); } -#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ void invalidate_dcache_all(void) { } @@ -177,9 +177,9 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop) void arm_init_domains(void) { } -#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) /* Invalidate entire I-cache and branch predictor array */ void invalidate_icache_all(void) { diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c index 8bf06a3e48..70431ecf6b 100644 --- a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c @@ -5,7 +5,7 @@ #include <common.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c b/arch/arm/cpu/armv7/kona-common/hwinit-common.c index 8783893cf6..10e7488879 100644 --- a/arch/arm/cpu/armv7/kona-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c @@ -6,7 +6,7 @@ #include <common.h> #include <linux/sizes.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 7c4018ed11..ecf9e86985 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) /* * Bit[1] of the descriptor indicates the descriptor type, @@ -215,7 +215,7 @@ void enable_caches(void) invalidate_dcache_all(); set_cr(get_cr() | CR_C); } -#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ uint get_svr(void) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 0cb6dd39cc..dcb4195d7b 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -97,7 +97,7 @@ ENTRY(c_runtime_cpu_setup) /* * If I-cache is enabled invalidate it */ -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) mcr p15, 0, r0, c7, c5, 0 @ invalidate icache mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB @@ -155,7 +155,7 @@ ENTRY(cpu_init_cp15) bic r0, r0, #0x00000007 @ clear bits 2:0 (-CAM) orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB -#ifdef CONFIG_SYS_ICACHE_OFF +#if CONFIG_IS_ENABLED(SYS_ICACHE_OFF) bic r0, r0, #0x00001000 @ clear bit 12 (I) I-cache #else orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index 90fa695e98..f962903484 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -360,7 +360,7 @@ int get_clocks(void) return 0; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index 815e623c29..1106bead41 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -54,7 +54,7 @@ enum cache_action { FLUSH_INVAL_SET_WAY, /* d-cache clean & invalidate by set/ways */ }; -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) struct dcache_config { u32 ways; u32 sets; @@ -292,7 +292,7 @@ void invalidate_dcache_all(void) } #endif -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) void invalidate_icache_all(void) { @@ -349,10 +349,10 @@ int icache_status(void) void enable_caches(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) dcache_enable(); #endif } diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9ca397e73c..e500e722e5 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) /* * With 4k page granule, a virtual address is split into 4 lookup parts @@ -657,7 +657,7 @@ void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs) __asm_invalidate_tlb_all(); } -#else /* CONFIG_SYS_DCACHE_OFF */ +#else /* !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ /* * For SPL builds, we may want to not have dcache enabled. Any real U-Boot @@ -694,9 +694,9 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, { } -#endif /* CONFIG_SYS_DCACHE_OFF */ +#endif /* !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) void icache_enable(void) { @@ -720,7 +720,7 @@ void invalidate_icache_all(void) __asm_invalidate_l3_icache(); } -#else /* CONFIG_SYS_ICACHE_OFF */ +#else /* !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) */ void icache_enable(void) { @@ -739,7 +739,7 @@ void invalidate_icache_all(void) { } -#endif /* CONFIG_SYS_ICACHE_OFF */ +#endif /* !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) */ /* * Enable dCache & iCache, whether cache is actually enabled diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 978d46b32f..12d709e23e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -388,7 +388,7 @@ void cpu_name(char *name) strcpy(name, "unknown"); } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) /* * To start MMU before DDR is available, we create MMU table in SRAM. * The base address of SRAM is CONFIG_SYS_FSL_OCRAM_BASE. We use three @@ -611,7 +611,7 @@ void enable_caches(void) icache_enable(); dcache_enable(); } -#endif /* CONFIG_SYS_DCACHE_OFF */ +#endif /* !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ #ifdef CONFIG_TFABOOT enum boot_src __get_boot_src(u32 porsr1) diff --git a/arch/arm/cpu/armv8/s32v234/cpu.c b/arch/arm/cpu/armv8/s32v234/cpu.c index 1fa6841eaf..b4cb67a66a 100644 --- a/arch/arm/cpu/armv8/s32v234/cpu.c +++ b/arch/arm/cpu/armv8/s32v234/cpu.c @@ -16,7 +16,7 @@ u32 cpu_mask(void) return readl(MC_ME_CS); } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define S32V234_IRAM_BASE 0x3e800000UL #define S32V234_IRAM_SIZE 0x800000UL diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c index 8b932b10e1..5cd4a9524b 100644 --- a/arch/arm/cpu/pxa/cache.c +++ b/arch/arm/cpu/pxa/cache.c @@ -6,7 +6,7 @@ #include <linux/types.h> #include <common.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void invalidate_dcache_all(void) { /* Flush/Invalidate I cache */ @@ -35,7 +35,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop) { return invalidate_dcache_range(start, stop); } -#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ void invalidate_dcache_all(void) { } @@ -43,7 +43,7 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } -#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ +#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ /* * Stub implementations for l2 cache operations diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index b9fd41ece2..0b28f0a3ef 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -286,10 +286,10 @@ void reset_cpu(ulong ignored) void enable_caches(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) dcache_enable(); #endif } diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi index 4b2eaeea2e..175af38018 100644 --- a/arch/arm/dts/bcm63158.dtsi +++ b/arch/arm/dts/bcm63158.dtsi @@ -66,6 +66,12 @@ clock-frequency = <0xbebc200>; u-boot,dm-pre-reloc; }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; }; ubus { @@ -92,13 +98,13 @@ wdt1: watchdog@ff800480 { compatible = "brcm,bcm6345-wdt"; reg = <0x0 0xff800480 0x0 0x14>; - clocks = <&periph_osc>; + clocks = <&refclk50mhz>; }; wdt2: watchdog@ff8004c0 { compatible = "brcm,bcm6345-wdt"; reg = <0x0 0xff8004c0 0x0 0x14>; - clocks = <&periph_osc>; + clocks = <&refclk50mhz>; }; wdt-reboot { diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi index 76ba0ea167..91f7787eb9 100644 --- a/arch/arm/dts/bcm6858.dtsi +++ b/arch/arm/dts/bcm6858.dtsi @@ -66,6 +66,12 @@ clock-frequency = <200000000>; u-boot,dm-pre-reloc; }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; }; ubus { @@ -92,13 +98,13 @@ wdt1: watchdog@ff802780 { compatible = "brcm,bcm6345-wdt"; reg = <0x0 0xff802780 0x0 0x14>; - clocks = <&periph_osc>; + clocks = <&refclk50mhz>; }; wdt2: watchdog@ff8027c0 { compatible = "brcm,bcm6345-wdt"; reg = <0x0 0xff8027c0 0x0 0x14>; - clocks = <&periph_osc>; + clocks = <&refclk50mhz>; }; wdt-reboot { diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index c3ee5f0c7b..a81b1061df 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -35,7 +35,7 @@ struct arch_global_data { unsigned int tbl; unsigned long lastinc; unsigned long long timer_reset_value; -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) unsigned long tlb_addr; unsigned long tlb_size; #if defined(CONFIG_ARM64) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0688f1e6a6..b2913e8165 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -10,7 +10,7 @@ #include <linux/compiler.h> #include <asm/armv7_mpu.h> -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) DECLARE_GLOBAL_DATA_PTR; @@ -246,7 +246,7 @@ static void cache_disable(uint32_t cache_bit) } #endif -#ifdef CONFIG_SYS_ICACHE_OFF +#if CONFIG_IS_ENABLED(SYS_ICACHE_OFF) void icache_enable (void) { return; @@ -278,7 +278,7 @@ int icache_status(void) } #endif -#ifdef CONFIG_SYS_DCACHE_OFF +#if CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void dcache_enable (void) { return; diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 565fbbe109..449544d11c 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -87,7 +87,7 @@ void noncached_init(void) noncached_end = end; noncached_next = start; -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF); #endif } diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index 589e16c5ad..2ae9a43b4e 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -25,7 +25,7 @@ void reset_cpu(ulong addr) #endif } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c index 75e1f54c6a..a605942503 100644 --- a/arch/arm/mach-imx/cache.c +++ b/arch/arm/mach-imx/cache.c @@ -37,7 +37,7 @@ static void enable_ca7_smp(void) } } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 2c425357b5..53f9a8735a 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -446,7 +446,7 @@ void enable_caches(void) dcache_enable(); } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) u64 get_page_table_size(void) { u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c index 43d6c08b42..bbb335e275 100644 --- a/arch/arm/mach-imx/mx5/soc.c +++ b/arch/arm/mach-imx/mx5/soc.c @@ -62,7 +62,7 @@ u32 __weak get_board_rev(void) } #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c index f43b3dcbfa..3dee300d77 100644 --- a/arch/arm/mach-keystone/init.c +++ b/arch/arm/mach-keystone/init.c @@ -204,7 +204,7 @@ void reset_cpu(ulong addr) void enable_caches(void) { -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) /* Enable D-cache. I-cache is already enabled in start.S */ dcache_enable(); #endif diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 893bd3f763..b6cf629c4f 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -26,12 +26,6 @@ #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ -/* - * Disable the dcache. Currently the network driver (mvgbe.c) and USB - * EHCI driver (ehci-marvell.c) and possibly others rely on the data - * cache being disabled. - */ -#define CONFIG_SYS_DCACHE_OFF /* * By default kwbimage.cfg from board specific folder is used diff --git a/arch/arm/mach-mediatek/mt8516/init.c b/arch/arm/mach-mediatek/mt8516/init.c index 26a215a8b1..186f6c048a 100644 --- a/arch/arm/mach-mediatek/mt8516/init.c +++ b/arch/arm/mach-mediatek/mt8516/init.c @@ -14,14 +14,10 @@ #include <asm/armv8/mmu.h> #include <asm/sections.h> #include <dm/uclass.h> -#include <linux/io.h> #include <dt-bindings/clock/mt8516-clk.h> DECLARE_GLOBAL_DATA_PTR; -#define WDOG_SWRST 0x10007014 -#define WDOG_SWRST_KEY 0x1209 - int dram_init(void) { int ret; @@ -87,10 +83,7 @@ int mtk_soc_early_init(void) void reset_cpu(ulong addr) { - while (1) { - writel(WDOG_SWRST_KEY, WDOG_SWRST); - mdelay(5); - } + psci_system_reset(); } int print_cpuinfo(void) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 0777a0c998..bb01eab80e 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -34,7 +34,7 @@ obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o endif endif -ifeq ($(CONFIG_SYS_DCACHE_OFF),) +ifeq ($(CONFIG_$(SPL_TPL_)SYS_DCACHE_OFF),) obj-y += omap-cache.o endif diff --git a/arch/arm/mach-omap2/omap5/sec_entry_cpu1.S b/arch/arm/mach-omap2/omap5/sec_entry_cpu1.S index 6dc92a6bfa..32de9d3d4f 100644 --- a/arch/arm/mach-omap2/omap5/sec_entry_cpu1.S +++ b/arch/arm/mach-omap2/omap5/sec_entry_cpu1.S @@ -16,7 +16,7 @@ .arch_extension sec -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) .global flush_dcache_range #endif @@ -79,7 +79,7 @@ ENTRY(omap_smc_sec_cpu1) push {r4, r5, lr} ldr r4, =omap_smc_sec_cpu1_args stm r4, {r0,r1,r2,r3} @ Save args to memory -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) mov r0, r4 mov r1, #CONFIG_SYS_CACHELINE_SIZE add r1, r0, r1 @ dcache is not enabled on CPU1, so @@ -109,7 +109,7 @@ ENDPROC(omap_smc_sec_cpu1) */ .section .data omap_smc_sec_cpu1_args: -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) .balign CONFIG_SYS_CACHELINE_SIZE .rept CONFIG_SYS_CACHELINE_SIZE/4 .word 0 diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c index 600a31280c..b45d3ee544 100644 --- a/arch/arm/mach-omap2/sec-common.c +++ b/arch/arm/mach-omap2/sec-common.c @@ -333,7 +333,7 @@ int secure_tee_install(u32 addr) debug("tee_info.tee_arg0 = %08X\n", tee_info.tee_arg0); debug("tee_file_size = %d\n", tee_file_size); -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) flush_dcache_range( rounddown((u32)loadptr, ARCH_DMA_MINALIGN), roundup((u32)loadptr + tee_file_size, ARCH_DMA_MINALIGN)); @@ -356,7 +356,7 @@ int secure_tee_install(u32 addr) /* Reuse the tee_info buffer for SMC params */ smc_cpu1_params = (u32 *)&tee_info; smc_cpu1_params[0] = 0; -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) flush_dcache_range((u32)smc_cpu1_params, (u32)smc_cpu1_params + roundup(sizeof(u32), ARCH_DMA_MINALIGN)); #endif diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index b0686ed203..784a2a28d5 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -17,7 +17,7 @@ int arch_cpu_init(void) /* R-Car Gen3 D-cache is enabled in memmap-gen3.c */ #ifndef CONFIG_RCAR_GEN3 -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { dcache_enable(); diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index 2094a4336d..e6ea0e9a6a 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -48,7 +48,7 @@ int dram_init(void) } #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index b1c66382e3..fa71685af8 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -57,7 +57,7 @@ int dram_init_banksize(void) return 0; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index e03759f789..80d8c4241e 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -75,7 +75,7 @@ err: #endif } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 6170c76f8b..e7a1e54874 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -58,7 +58,7 @@ int dram_init_banksize(void) return 0; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 41e9786d46..e2de5b2fdd 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -186,7 +186,7 @@ err: #endif } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c index 33596f628c..66aeb3ffcc 100644 --- a/arch/arm/mach-rockchip/rv1108/rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/rv1108.c @@ -6,7 +6,7 @@ #include <common.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-s5pc1xx/cache.c b/arch/arm/mach-s5pc1xx/cache.c index 12c9d7ce3a..0b879b545d 100644 --- a/arch/arm/mach-s5pc1xx/cache.c +++ b/arch/arm/mach-s5pc1xx/cache.c @@ -9,7 +9,7 @@ #include <common.h> -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { dcache_enable(); diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index d887f0201f..db1983dc31 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -48,10 +48,10 @@ int dram_init(void) void enable_caches(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) dcache_enable(); #endif } diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index c6dd7b8e54..7f5b633e01 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -300,7 +300,7 @@ void reset_cpu(ulong addr) #endif } -#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index f8fc042a1d..4e159075d3 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -226,7 +226,7 @@ U_BOOT_DEVICE(ns16550_com1) = { }; #endif -#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index a3422cd5cf..e5f557716b 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -83,7 +83,7 @@ void reset_cpu(ulong addr) ; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig index d72ff46113..b6f16bf124 100644 --- a/arch/nds32/Kconfig +++ b/arch/nds32/Kconfig @@ -16,6 +16,32 @@ config TARGET_ADP_AE3XX endchoice +config SYS_ICACHE_OFF + bool "Do not enable icache" + default n + help + Do not enable instruction cache in U-Boot. + +config SPL_SYS_ICACHE_OFF + bool "Do not enable icache in SPL" + depends on SPL + default SYS_ICACHE_OFF + help + Do not enable instruction cache in SPL. + +config SYS_DCACHE_OFF + bool "Do not enable dcache" + default n + help + Do not enable data cache in U-Boot. + +config SPL_SYS_DCACHE_OFF + bool "Do not enable dcache in SPL" + depends on SPL + default SYS_DCACHE_OFF + help + Do not enable data cache in SPL. + source "board/AndesTech/adp-ag101p/Kconfig" source "board/AndesTech/adp-ae3xx/Kconfig" diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S index cf966e2132..691888157f 100644 --- a/arch/nds32/cpu/n1213/start.S +++ b/arch/nds32/cpu/n1213/start.S @@ -129,7 +129,7 @@ set_ivb: mfsr $r1, $mr8 and $r1, $r1, $r0 mtsr $r1, $mr8 -#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) /* * MMU_CTL NTC0 Cacheable/Write-Back */ @@ -139,7 +139,7 @@ set_ivb: mtsr $r1, $mr0 #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #ifdef CONFIG_ARCH_MAP_SYSMEM /* * MMU_CTL NTC1 Non-cacheable @@ -158,14 +158,14 @@ set_ivb: #endif #endif -#if !defined(CONFIG_SYS_ICACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) li $r0, 0x1 mfsr $r1, $mr8 or $r1, $r1, $r0 mtsr $r1, $mr8 #endif -#if !defined(CONFIG_SYS_DCACHE_OFF) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) li $r0, 0x2 mfsr $r1, $mr8 or $r1, $r1, $r0 diff --git a/arch/nds32/lib/cache.c b/arch/nds32/lib/cache.c index 9ab30d1965..27065136dd 100644 --- a/arch/nds32/lib/cache.c +++ b/arch/nds32/lib/cache.c @@ -6,7 +6,7 @@ */ #include <common.h> -#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) static inline unsigned long CACHE_SET(unsigned char cache) { if (cache == ICACHE) @@ -38,7 +38,7 @@ static inline unsigned long CACHE_LINE_SIZE(enum cache_t cache) } #endif -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) void invalidate_icache_all(void) { unsigned long end, line_size; @@ -133,7 +133,7 @@ int icache_status(void) #endif -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void dcache_wbinval_all(void) { unsigned long end, line_size; diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 362f3cdc65..0d04d91ad4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -19,6 +19,32 @@ config TARGET_SIFIVE_FU540 endchoice +config SYS_ICACHE_OFF + bool "Do not enable icache" + default n + help + Do not enable instruction cache in U-Boot. + +config SPL_SYS_ICACHE_OFF + bool "Do not enable icache in SPL" + depends on SPL + default SYS_ICACHE_OFF + help + Do not enable instruction cache in SPL. + +config SYS_DCACHE_OFF + bool "Do not enable dcache" + default n + help + Do not enable data cache in U-Boot. + +config SPL_SYS_DCACHE_OFF + bool "Do not enable dcache in SPL" + depends on SPL + default SYS_DCACHE_OFF + help + Do not enable data cache in SPL. + # board-specific options below source "board/AndesTech/ax25-ae350/Kconfig" source "board/emulation/qemu-riscv/Kconfig" diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c index 228fc55f56..cd95058d9d 100644 --- a/arch/riscv/cpu/ax25/cache.c +++ b/arch/riscv/cpu/ax25/cache.c @@ -30,7 +30,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long end) void icache_enable(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) #ifdef CONFIG_RISCV_NDS_CACHE asm volatile ( "csrr t1, mcache_ctl\n\t" @@ -43,7 +43,7 @@ void icache_enable(void) void icache_disable(void) { -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) #ifdef CONFIG_RISCV_NDS_CACHE asm volatile ( "fence.i\n\t" @@ -57,7 +57,7 @@ void icache_disable(void) void dcache_enable(void) { -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #ifdef CONFIG_RISCV_NDS_CACHE asm volatile ( "csrr t1, mcache_ctl\n\t" @@ -70,7 +70,7 @@ void dcache_enable(void) void dcache_disable(void) { -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #ifdef CONFIG_RISCV_NDS_CACHE asm volatile ( "fence\n\t" diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 2ba7132c20..6de31e8c1e 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -16,6 +16,32 @@ config TARGET_XTFPGA endchoice +config SYS_ICACHE_OFF + bool "Do not enable icache" + default n + help + Do not enable instruction cache in U-Boot. + +config SPL_SYS_ICACHE_OFF + bool "Do not enable icache in SPL" + depends on SPL + default SYS_ICACHE_OFF + help + Do not enable instruction cache in SPL. + +config SYS_DCACHE_OFF + bool "Do not enable dcache" + default n + help + Do not enable data cache in U-Boot. + +config SPL_SYS_DCACHE_OFF + bool "Do not enable dcache in SPL" + depends on SPL + default SYS_DCACHE_OFF + help + Do not enable data cache in SPL. + source "board/cadence/xtfpga/Kconfig" endmenu diff --git a/arch/xtensa/cpu/start.S b/arch/xtensa/cpu/start.S index 66acb4c610..38d2fa2fe1 100644 --- a/arch/xtensa/cpu/start.S +++ b/arch/xtensa/cpu/start.S @@ -164,19 +164,19 @@ _start: * enable data/instruction cache for relocated image. */ #if XCHAL_HAVE_SPANNING_WAY && \ - (!defined(CONFIG_SYS_DCACHE_OFF) || \ - !defined(CONFIG_SYS_ICACHE_OFF)) + !(CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && \ + CONFIG_IS_ENABLED(SYS_ICACHE_OFF)) srli a7, a4, 29 slli a7, a7, 29 addi a7, a7, XCHAL_SPANNING_WAY -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) rdtlb1 a8, a7 srli a8, a8, 4 slli a8, a8, 4 addi a8, a8, CA_WRITEBACK wdtlb a8, a7 #endif -#ifndef CONFIG_SYS_ICACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) ritlb1 a8, a7 srli a8, a8, 4 slli a8, a8, 4 diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index b4fc8f3ce1..111e64b995 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -26,7 +26,7 @@ int dram_init_banksize(void) return 0; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index cbeba6ba28..f576e226ee 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -321,7 +321,7 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, print_eths(); #endif print_baudrate(); -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) print_num("TLB addr", gd->arch.tlb_addr); #endif print_num("relocaddr", gd->relocaddr); diff --git a/common/board_f.c b/common/board_f.c index 7ef20f2042..c25eb188fb 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -381,7 +381,7 @@ static int reserve_round_4k(void) #ifdef CONFIG_ARM __weak int reserve_mmu(void) { -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) /* reserve TLB table */ gd->arch.tlb_size = PGTABLE_SIZE; gd->relocaddr -= gd->arch.tlb_size; diff --git a/common/lcd.c b/common/lcd.c index cd630405d4..95526b1e17 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -61,7 +61,7 @@ void lcd_sync(void) * architectures do not actually implement it. Is there a way to find * out whether it exists? For now, ARM is safe. */ -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_DCACHE_OFF) +#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) int line_length; if (lcd_flush_dcache) diff --git a/common/spl/spl.c b/common/spl/spl.c index 0a6a47c202..4ddeff9b51 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -195,10 +195,12 @@ static int spl_load_fit_image(struct spl_image_info *spl_image, #ifdef CONFIG_SPL_FIT_SIGNATURE images.verify = 1; #endif - fit_image_load(&images, (ulong)header, + ret = fit_image_load(&images, (ulong)header, &fit_uname_fdt, &fit_uname_config, IH_ARCH_DEFAULT, IH_TYPE_FLATDT, -1, FIT_LOAD_OPTIONAL, &dt_data, &dt_len); + if (ret >= 0) + spl_image->fdt_addr = (void *)dt_data; conf_noffset = fit_conf_get_node((const void *)header, fit_uname_config); diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index afda7eda59..8cb397c757 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFKW=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 4cb4797a11..1f7ff812f4 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFXCAT=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index b1d923c069..8168c3a7f7 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y # CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0xE80C0000 diff --git a/configs/axm_defconfig b/configs/axm_defconfig index bcc5a0aa4a..73febdf423 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig index 214a6a66fe..baffb2d117 100644 --- a/configs/bcm23550_w1d_defconfig +++ b/configs/bcm23550_w1d_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_TARGET_BCM23550_W1D=y CONFIG_SYS_TEXT_BASE=0x9f000000 diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 321bc22699..dfd69069c7 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -16,7 +16,6 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTEFI_SELFTEST=y # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index d6509e30bc..d331e4e807 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -14,7 +14,6 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 63acd28c7e..3787a9573a 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_VENDOR="bitmain" CONFIG_SYS_BOARD="antminer_s9" CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 6cd948e159..492ee9eaaf 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_COLIBRI_PXA270=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 9a4d770180..845565d620 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 09c6147e2d..8c16d5c4f5 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -47,6 +47,7 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y +CONFIG_SPL_BLOCK_CACHE=y CONFIG_DM_GPIO=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/db-88f6281-bp-nand_defconfig b/configs/db-88f6281-bp-nand_defconfig index 3004347792..ffb24eaf58 100644 --- a/configs/db-88f6281-bp-nand_defconfig +++ b/configs/db-88f6281-bp-nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/db-88f6281-bp-spi_defconfig b/configs/db-88f6281-bp-spi_defconfig index e0596806ad..4b1b158d4d 100644 --- a/configs/db-88f6281-bp-spi_defconfig +++ b/configs/db-88f6281-bp-spi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index b41a97f756..c7a7983976 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_LPC32XX=y CONFIG_SYS_TEXT_BASE=0x83F00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 20c6628956..aca8abbe9c 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DNS325=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 41a70c9e3f..679c18236f 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DOCKSTAR=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 728b470b94..e148208f99 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DREAMPLUG=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 22996e893d..671572b976 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DS109=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 7fb52d2732..b73da72b16 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ASPEED=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ASPEED_AST2500=y diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig index f6e8048b60..a13f609da4 100644 --- a/configs/flea3_defconfig +++ b/configs/flea3_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_FLEA3=y CONFIG_SYS_TEXT_BASE=0xA0000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index c9abfb505c..b5d31db322 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GOFLEXHOME=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index b12dec28ae..fe2e00a0b6 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_GPLUGD=y CONFIG_SYS_TEXT_BASE=0x00f00000 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index c0e798e412..787ba6c87a 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GURUPLUG=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index ea64ca7755..50e6bce80b 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_HIGHBANK=y CONFIG_SYS_TEXT_BASE=0x00008000 diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 5cadc56515..979f724d85 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_IB62X0=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index e1fb3c7bbe..eb0e8a9c88 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_ICONNECT=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 6811a62bd1..7383124851 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8M=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_IMX8MQ_EVK=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 238d44d1f5..1a6ce3abf8 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 59675e56b9..c4a8cf3881 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2d43a67606..53898a15c5 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index d68045bd24..78864f2419 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_ISW_ENTRY_ADDR=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000000 diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index bcc8a693a9..5fabbb42d9 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0xC100000 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 13cf9c9116..48d7fdc0af 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_ISW_ENTRY_ADDR=0xC0A0000 CONFIG_SYS_TEXT_BASE=0xC000000 diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index e93fc001fa..05f535b8d0 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0xC0A0000 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 37308aa336..12358d15a9 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_ISW_ENTRY_ADDR=0xC200000 CONFIG_SYS_TEXT_BASE=0xC000000 diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index cfa595956a..64537cea0a 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0xC200000 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index cbe1fdff45..1eef7f8997 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_ISW_ENTRY_ADDR=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000000 diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 66f48a1922..c412c6f51b 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0xC100000 diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 92fb248111..0bd9a7f4a3 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index b1a95cb381..08b8825196 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 443399daf2..5abf543270 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 7ec728149d..b6ac31e0ff 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 34ece1888a..08e9b7566a 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index 63c5925fdc..cafc1f97cb 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index b2d62320a4..14c1c168f6 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 906800c2fd..f02776da24 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 038f9d1bb6..daeecb5e51 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index d85a216ddb..6b36cf9ce8 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 5ca8223490..80b122d74f 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NAS220=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index cec280ba5a..9ae774a0ec 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 3fa5938b81..6611046803 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 3367889753..41eeab8ad1 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 9a0afaa2cf..fd56ae0dc2 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 2f3f4d35aa..ffb60dabcf 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index eb29a70157..a428d76129 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NSA310S=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index ea27731da3..3a529e8836 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -4,7 +4,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TI_COMMON_CMD_OPTIONS=y -# CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 446a6d41f2..0868e33131 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -4,7 +4,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TI_COMMON_CMD_OPTIONS=y -# CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 151e3c25f9..23521b295f 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index c5404eff9c..ea53231555 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index d6dcbb6cc7..589e248bbd 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 9d5bf7e150..e7d2f455f8 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS4=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 943a5008af..58780607eb 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_POGO_E02=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 7e0abaa837..fa546aa994 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index e290c38bc2..74a52e6670 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_SYS_THUMB_BUILD=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 005b6e9044..ffe50b1fd7 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_SPL_SYS_THUMB_BUILD=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23000000 CONFIG_TARGET_SMARTWEB=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 834a75fde3..0012374e69 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_STV0991=y CONFIG_SYS_TEXT_BASE=0x00010000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 896232a715..5616b3e23a 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="opalkelly" CONFIG_SYS_CONFIG_NAME="syzygy_hub" CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 02a89592d7..8af7dd7c3a 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_AT91=y CONFIG_SPL_LDSCRIPT="arch/$(ARCH)/cpu/u-boot-spl.lds" CONFIG_SYS_TEXT_BASE=0x21000000 diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index b55885669d..bb8d37a370 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 6983245173..87af8c81d3 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 89461ee6d2..874ca8a746 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_VENDOR="topic" CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index bb74542b67..ebc12abc27 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_WOODBURN=y CONFIG_SYS_TEXT_BASE=0xA0000000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 4976a70194..7182affbca 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_WOODBURN_SD=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_GPIO_SUPPORT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 2cfcf4d337..bbd13e0cd9 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_LPC32XX=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 186c1641bf..19fac90122 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini_qspi" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 7f12da62ac..60c368c766 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 720b0dda87..cbbf75fe42 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index e54c81cb48..aa9dd230b5 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index c8d6886493..0faa332613 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 29e472842a..867d2e5d9c 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 6dc0690fe2..4be624813c 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 3fe9820ad3..d3cc851176 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" +CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x80 diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig index 089df8db15..966bb150d1 100644 --- a/configs/zynq_cc108_defconfig +++ b/configs/zynq_cc108_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 23f9549bee..76b85d4cb3 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_ENV_SIZE=0x190 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index d2bddecc27..fad7b5d66e 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 2d33b6231e..8adeffcec9 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" +CONFIG_SYS_ICACHE_OFF=y +CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 diff --git a/configs/zynq_dlc20_rev1_0_defconfig b/configs/zynq_dlc20_rev1_0_defconfig index 913581e504..f9d2b31aac 100644 --- a/configs/zynq_dlc20_rev1_0_defconfig +++ b/configs/zynq_dlc20_rev1_0_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 83fa967641..5e7ff1666e 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig index 809fa91e96..f253483b48 100644 --- a/configs/zynq_minized_defconfig +++ b/configs/zynq_minized_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 09d78dc8ba..0650ce2624 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig index f24fe31dc7..4839ee238f 100644 --- a/configs/zynq_z_turn_defconfig +++ b/configs/zynq_z_turn_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 748b080c7c..71559b09b0 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 9b0ddb0c93..132ef6c0d7 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 8653d7a679..8ba35cb983 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index eb25836097..84f46a7924 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc770_xm011_x16_defconfig b/configs/zynq_zc770_xm011_x16_defconfig index 4e403394e0..43ff1f4d16 100644 --- a/configs/zynq_zc770_xm011_x16_defconfig +++ b/configs/zynq_zc770_xm011_x16_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 868b73b590..2adf686881 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index b1d19f1cc2..ed6506d1ca 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 09fc1c3b72..2da6d40b49 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 607bc276b4..b51272b354 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig index 81da0d28ac..4deb14eefa 100644 --- a/configs/zynq_zybo_z7_defconfig +++ b/configs/zynq_zybo_z7_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 188d843197..e3135bb75f 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -55,17 +55,6 @@ __weak void __iomem *ahci_port_base(void __iomem *base, u32 port) return base + 0x100 + (port * 0x80); } - -static void ahci_setup_port(struct ahci_ioports *port, void __iomem *base, - unsigned int port_idx) -{ - base = ahci_port_base(base, port_idx); - - port->cmd_addr = base; - port->scr_addr = base + PORT_SCR; -} - - #define msleep(a) udelay(a * 1000) static void ahci_dcache_flush_range(unsigned long begin, unsigned long len) @@ -240,7 +229,6 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) continue; uc_priv->port[i].port_mmio = ahci_port_base(mmio, i); port_mmio = (u8 *)uc_priv->port[i].port_mmio; - ahci_setup_port(&uc_priv->port[i], mmio, i); /* make sure port is not active */ tmp = readl(port_mmio + PORT_CMD); diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index 017cc89a89..ac589feeb7 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -81,7 +81,7 @@ static int mxs_dma_read_semaphore(int channel) return tmp; } -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void mxs_dma_flush_desc(struct mxs_dma_desc *desc) { uint32_t addr; diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c index be4ee2c7f8..b93d77a395 100644 --- a/drivers/mtd/nand/raw/mxs_nand.c +++ b/drivers/mtd/nand/raw/mxs_nand.c @@ -50,7 +50,7 @@ struct nand_ecclayout fake_ecc_layout; /* * Cache management functions */ -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) static void mxs_nand_flush_data_buf(struct mxs_nand_info *info) { uint32_t addr = (uint32_t)info->data_buf; diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 9f1c5af46e..590e756f5c 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -241,7 +241,7 @@ struct eqos_tegra186_regs { */ #if EQOS_DESCRIPTOR_SIZE < ARCH_DMA_MINALIGN #if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \ - !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_X86) + !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86) #warning Cache line size is larger than descriptor size #endif #endif diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index bc052e7256..521e5909a2 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -302,7 +302,7 @@ static unsigned char rxdata[RX_BUF_LEN]; */ #if RTL8169_DESC_SIZE < ARCH_DMA_MINALIGN #if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \ - !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_X86) + !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86) #warning cache-line size is larger than descriptor size #endif #endif diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 8e54e7cc7a..da79b766a6 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -34,7 +34,8 @@ # error "Please define CONFIG_SH_ETHER_PHY_ADDR" #endif -#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && !defined(CONFIG_SYS_DCACHE_OFF) +#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \ + !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define flush_cache_wback(addr, len) \ flush_dcache_range((u32)addr, \ (u32)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE))) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 14aac88d6d..b19bfb4f2f 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -149,7 +149,7 @@ void video_sync(struct udevice *vid, bool force) * architectures do not actually implement it. Is there a way to find * out whether it exists? For now, ARM is safe. */ -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_DCACHE_OFF) +#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) struct video_priv *priv = dev_get_uclass_priv(vid); if (priv->flush_dcache) { diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c index 44f5662038..9f14e7d777 100644 --- a/drivers/watchdog/bcm6345_wdt.c +++ b/drivers/watchdog/bcm6345_wdt.c @@ -10,6 +10,7 @@ #include <common.h> #include <dm.h> #include <wdt.h> +#include <clk.h> #include <asm/io.h> /* WDT Value register */ @@ -26,6 +27,7 @@ struct bcm6345_wdt_priv { void __iomem *regs; + unsigned long clk_rate; }; static int bcm6345_wdt_reset(struct udevice *dev) @@ -41,16 +43,17 @@ static int bcm6345_wdt_reset(struct udevice *dev) static int bcm6345_wdt_start(struct udevice *dev, u64 timeout, ulong flags) { struct bcm6345_wdt_priv *priv = dev_get_priv(dev); + u32 val = priv->clk_rate / 1000 * timeout; - if (timeout < WDT_VAL_MIN) { + if (val < WDT_VAL_MIN) { debug("watchdog won't fire with less than 2 ticks\n"); - timeout = WDT_VAL_MIN; - } else if (timeout > WDT_VAL_MAX) { + val = WDT_VAL_MIN; + } else if (val > WDT_VAL_MAX) { debug("maximum watchdog timeout exceeded\n"); - timeout = WDT_VAL_MAX; + val = WDT_VAL_MAX; } - writel(timeout, priv->regs + WDT_VAL_REG); + writel(val, priv->regs + WDT_VAL_REG); return bcm6345_wdt_reset(dev); } @@ -85,11 +88,19 @@ static const struct udevice_id bcm6345_wdt_ids[] = { static int bcm6345_wdt_probe(struct udevice *dev) { struct bcm6345_wdt_priv *priv = dev_get_priv(dev); + struct clk clk; + int ret; priv->regs = dev_remap_addr(dev); if (!priv->regs) return -EINVAL; + ret = clk_get_by_index(dev, 0, &clk); + if (!ret) + priv->clk_rate = clk_get_rate(&clk); + else + return -EINVAL; + bcm6345_wdt_stop(dev); return 0; diff --git a/include/ahci.h b/include/ahci.h index b42df6c77e..fb96dd8861 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -134,8 +134,6 @@ struct ahci_sg { }; struct ahci_ioports { - void __iomem *cmd_addr; - void __iomem *scr_addr; void __iomem *port_mmio; struct ahci_cmd_hdr *cmd_slot; struct ahci_sg *cmd_tbl_sg; diff --git a/include/android_bootloader_message.h b/include/android_bootloader_message.h new file mode 100644 index 0000000000..b84789f022 --- /dev/null +++ b/include/android_bootloader_message.h @@ -0,0 +1,246 @@ +/* + * This is from the Android Project, + * Repository: https://android.googlesource.com/platform/bootable/recovery + * File: bootloader_message/include/bootloader_message/bootloader_message.h + * Commit: c784ce50e8c10eaf70e1f97e24e8324aef45faf5 + * + * Copyright (C) 2008 The Android Open Source Project + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __ANDROID_BOOTLOADER_MESSAGE_H +#define __ANDROID_BOOTLOADER_MESSAGE_H + +/* compiler.h defines the types that otherwise are included from stdint.h and + * stddef.h + */ +#include <compiler.h> + +/* Spaces used by misc partition are as below: + * 0 - 2K For bootloader_message + * 2K - 16K Used by Vendor's bootloader (the 2K - 4K range may be optionally used + * as bootloader_message_ab struct) + * 16K - 64K Used by uncrypt and recovery to store wipe_package for A/B devices + * Note that these offsets are admitted by bootloader,recovery and uncrypt, so they + * are not configurable without changing all of them. */ +static const size_t BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0; +static const size_t WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024; + +/* Bootloader Message (2-KiB) + * + * This structure describes the content of a block in flash + * that is used for recovery and the bootloader to talk to + * each other. + * + * The command field is updated by linux when it wants to + * reboot into recovery or to update radio or bootloader firmware. + * It is also updated by the bootloader when firmware update + * is complete (to boot into recovery for any final cleanup) + * + * The status field was used by the bootloader after the completion + * of an "update-radio" or "update-hboot" command, which has been + * deprecated since Froyo. + * + * The recovery field is only written by linux and used + * for the system to send a message to recovery or the + * other way around. + * + * The stage field is written by packages which restart themselves + * multiple times, so that the UI can reflect which invocation of the + * package it is. If the value is of the format "#/#" (eg, "1/3"), + * the UI will add a simple indicator of that status. + * + * We used to have slot_suffix field for A/B boot control metadata in + * this struct, which gets unintentionally cleared by recovery or + * uncrypt. Move it into struct bootloader_message_ab to avoid the + * issue. + */ +struct bootloader_message { + char command[32]; + char status[32]; + char recovery[768]; + + /* The 'recovery' field used to be 1024 bytes. It has only ever + * been used to store the recovery command line, so 768 bytes + * should be plenty. We carve off the last 256 bytes to store the + * stage string (for multistage packages) and possible future + * expansion. */ + char stage[32]; + + /* The 'reserved' field used to be 224 bytes when it was initially + * carved off from the 1024-byte recovery field. Bump it up to + * 1184-byte so that the entire bootloader_message struct rounds up + * to 2048-byte. */ + char reserved[1184]; +}; + +/** + * We must be cautious when changing the bootloader_message struct size, + * because A/B-specific fields may end up with different offsets. + */ +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_message) == 2048, + "struct bootloader_message size changes, which may break A/B devices"); +#endif + +/** + * The A/B-specific bootloader message structure (4-KiB). + * + * We separate A/B boot control metadata from the regular bootloader + * message struct and keep it here. Everything that's A/B-specific + * stays after struct bootloader_message, which should be managed by + * the A/B-bootloader or boot control HAL. + * + * The slot_suffix field is used for A/B implementations where the + * bootloader does not set the androidboot.ro.boot.slot_suffix kernel + * commandline parameter. This is used by fs_mgr to mount /system and + * other partitions with the slotselect flag set in fstab. A/B + * implementations are free to use all 32 bytes and may store private + * data past the first NUL-byte in this field. It is encouraged, but + * not mandatory, to use 'struct bootloader_control' described below. + * + * The update_channel field is used to store the Omaha update channel + * if update_engine is compiled with Omaha support. + */ +struct bootloader_message_ab { + struct bootloader_message message; + char slot_suffix[32]; + char update_channel[128]; + + /* Round up the entire struct to 4096-byte. */ + char reserved[1888]; +}; + +/** + * Be cautious about the struct size change, in case we put anything post + * bootloader_message_ab struct (b/29159185). + */ +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_message_ab) == 4096, + "struct bootloader_message_ab size changes"); +#endif + +#define BOOT_CTRL_MAGIC 0x42414342 /* Bootloader Control AB */ +#define BOOT_CTRL_VERSION 1 + +struct slot_metadata { + /* Slot priority with 15 meaning highest priority, 1 lowest + * priority and 0 the slot is unbootable. */ + uint8_t priority : 4; + /* Number of times left attempting to boot this slot. */ + uint8_t tries_remaining : 3; + /* 1 if this slot has booted successfully, 0 otherwise. */ + uint8_t successful_boot : 1; + /* 1 if this slot is corrupted from a dm-verity corruption, 0 + * otherwise. */ + uint8_t verity_corrupted : 1; + /* Reserved for further use. */ + uint8_t reserved : 7; +} __attribute__((packed)); + +/* Bootloader Control AB + * + * This struct can be used to manage A/B metadata. It is designed to + * be put in the 'slot_suffix' field of the 'bootloader_message' + * structure described above. It is encouraged to use the + * 'bootloader_control' structure to store the A/B metadata, but not + * mandatory. + */ +struct bootloader_control { + /* NUL terminated active slot suffix. */ + char slot_suffix[4]; + /* Bootloader Control AB magic number (see BOOT_CTRL_MAGIC). */ + uint32_t magic; + /* Version of struct being used (see BOOT_CTRL_VERSION). */ + uint8_t version; + /* Number of slots being managed. */ + uint8_t nb_slot : 3; + /* Number of times left attempting to boot recovery. */ + uint8_t recovery_tries_remaining : 3; + /* Ensure 4-bytes alignment for slot_info field. */ + uint8_t reserved0[2]; + /* Per-slot information. Up to 4 slots. */ + struct slot_metadata slot_info[4]; + /* Reserved for further use. */ + uint8_t reserved1[8]; + /* CRC32 of all 28 bytes preceding this field (little endian + * format). */ + uint32_t crc32_le; +} __attribute__((packed)); + +#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus) +static_assert(sizeof(struct bootloader_control) == + sizeof(((struct bootloader_message_ab *)0)->slot_suffix), + "struct bootloader_control has wrong size"); +#endif + +#ifndef __UBOOT__ + +#ifdef __cplusplus + +#include <string> +#include <vector> + +/* Return the block device name for the bootloader message partition and waits + * for the device for up to 10 seconds. In case of error returns the empty + * string. */ +std::string get_bootloader_message_blk_device(std::string* err); + +/* Read bootloader message into boot. Error message will be set in err. */ +bool read_bootloader_message(bootloader_message* boot, std::string* err); + +/* Read bootloader message from the specified misc device into boot. */ +bool read_bootloader_message_from(bootloader_message* boot, const std::string& misc_blk_device, + std::string* err); + +/* Write bootloader message to BCB. */ +bool write_bootloader_message(const bootloader_message& boot, std::string* err); + +/* Write bootloader message to the specified BCB device. */ +bool write_bootloader_message_to(const bootloader_message& boot, + const std::string& misc_blk_device, std::string* err); + +/* Write bootloader message (boots into recovery with the options) to BCB. Will + * set the command and recovery fields, and reset the rest. */ +bool write_bootloader_message(const std::vector<std::string>& options, std::string* err); + +/* Write bootloader message (boots into recovery with the options) to the specific BCB device. Will + * set the command and recovery fields, and reset the rest. */ +bool write_bootloader_message_to(const std::vector<std::string>& options, + const std::string& misc_blk_device, std::string* err); + +/* Update bootloader message (boots into recovery with the options) to BCB. Will + * only update the command and recovery fields. */ +bool update_bootloader_message(const std::vector<std::string>& options, std::string* err); + +/* Update bootloader message (boots into recovery with the |options|) in |boot|. Will only update + * the command and recovery fields. */ +bool update_bootloader_message_in_struct(bootloader_message* boot, + const std::vector<std::string>& options); + +/* Clear BCB. */ +bool clear_bootloader_message(std::string* err); + +/* Writes the reboot-bootloader reboot reason to the bootloader_message. */ +bool write_reboot_bootloader(std::string* err); + +/* Read the wipe package from BCB (from offset WIPE_PACKAGE_OFFSET_IN_MISC). */ +bool read_wipe_package(std::string* package_data, size_t size, std::string* err); + +/* Write the wipe package into BCB (to offset WIPE_PACKAGE_OFFSET_IN_MISC). */ +bool write_wipe_package(const std::string& package_data, std::string* err); + +#else + +#include <stdbool.h> + +/* C Interface. */ +bool write_bootloader_message(const char* options); +bool write_reboot_bootloader(void); + +#endif /* ifdef __cplusplus */ + +#endif /* __UBOOT__ */ + +#endif /* __ANDROID_BOOTLOADER_MESSAGE_H */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 771189d877..0cb40e721c 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ #define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) -#define CONFIG_SYS_DCACHE_OFF /* STACK */ #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 46062492cd..6815c5ff2c 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -15,9 +15,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -/* Enable cache controller */ -#define CONFIG_SYS_DCACHE_OFF - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #ifdef CONFIG_PRE_CON_BUF_SZ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index d0c7de34a0..deafb7b702 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -100,8 +100,6 @@ #define CONFIG_USBID_ADDR 0x34052c46 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_SYS_L2CACHE_OFF #endif /* __BCM23550_W1D_H */ diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 2de6f21861..a0f7ead4c7 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* CONFIG_NAND */ /* diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index 355f3ef5be..aa6ce67d53 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -12,5 +12,4 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* CONFIG_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 52b4f55f7c..fdb620341d 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* CONFIG_NAND */ /* diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 622b02492d..d4802f9914 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -16,9 +16,6 @@ /* Avoid overwriting factory configuration block */ #define CONFIG_BOARD_SIZE_LIMIT 0x40000 -/* We will never enable dcache because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - /* * Environment settings */ diff --git a/include/configs/db-88f6281-bp.h b/include/configs/db-88f6281-bp.h index 680de8f294..97af9a6258 100644 --- a/include/configs/db-88f6281-bp.h +++ b/include/configs/db-88f6281-bp.h @@ -94,6 +94,4 @@ #define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */ -#define CONFIG_SYS_DCACHE_OFF - #endif /* _CONFIG_DB_88F6281_BP_H */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index ae9e4d4a2c..c93a5deb99 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -14,8 +14,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #if !defined(CONFIG_SPL_BUILD) #define CONFIG_SKIP_LOWLEVEL_INIT #endif diff --git a/include/configs/flea3.h b/include/configs/flea3.h index e7f8b7a2ae..4cd823fa36 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -17,8 +17,6 @@ /* High Level Configuration Options */ #define CONFIG_MX35 -#define CONFIG_SYS_DCACHE_OFF - #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 /* Set TEXT at the beginning of the NOR flash */ diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index a8c4ddf0fd..7da8739a19 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -33,9 +33,6 @@ * Commands configuration */ -/* Disable DCACHE */ -#define CONFIG_SYS_DCACHE_OFF - /* Network configuration */ #ifdef CONFIG_CMD_NET #define CONFIG_ARMADA100_FEC diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 2566867e82..c0e295b6b7 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_DCACHE_OFF - #define CONFIG_SYS_BOOTMAPSZ (16 << 20) #define CONFIG_SYS_TIMER_RATE (150000000/256) diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 7759bbf264..e4fa2df342 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 02c5d1c054..2bdf3be654 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_MALLOC_F_ADDR 0x00120000 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 40163c8d50..261661a978 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_MALLOC_F_ADDR 0x00120000 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 5bd6392973..2af5a4fe3e 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -167,7 +167,7 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifndef CONFIG_SYS_DCACHE_OFF +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define CONFIG_CMD_CACHE #endif diff --git a/include/configs/origen.h b/include/configs/origen.h index 1075084ba3..44561acbf4 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -14,8 +14,6 @@ #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ -#define CONFIG_SYS_DCACHE_OFF 1 - /* ORIGEN has 4 bank of DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 0d0c6bdc69..776d7d7970 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -216,11 +216,6 @@ #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10483f0e -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#endif - #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 3177b7a759..e5262085fc 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_STV0991_H #define __CONFIG_STV0991_H -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH /* ram memory-related information */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 45a4a800c5..dbb01af439 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -21,10 +21,6 @@ #include <asm/hardware.h> #include <linux/sizes.h> -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#endif /* * Warning: changing CONFIG_SYS_TEXT_BASE requires * adapting the initial boot program. diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 6c867671cf..b44b51bbd1 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -17,7 +17,6 @@ /* SoC Configuration */ #define CONFIG_ARCH_CPU_INIT #define CONFIG_SPL_TARGET "u-boot-spi.gph" -#define CONFIG_SYS_DCACHE_OFF /* Memory Configuration */ #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index bec7b68794..5b42e0c1de 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -45,10 +45,6 @@ * MMU and Cache Setting *----------------------------------------------------------------------*/ -/* Comment out the following to enable L1 cache */ -/* #define CONFIG_SYS_ICACHE_OFF */ -/* #define CONFIG_SYS_DCACHE_OFF */ - #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) #define CONFIG_TIMESTAMP diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index 82c57b65e6..5ad3dab51c 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -17,8 +17,6 @@ #define CONFIG_MX35_HCLK_FREQ 24000000 #define CONFIG_SYS_FSL_CLK -#define CONFIG_SYS_DCACHE_OFF - #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 /* This is required to setup the ESDC controller */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 8d97905a59..e260a637d6 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -19,8 +19,6 @@ */ #define CONFIG_MACH_TYPE 736 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #if !defined(CONFIG_SPL_BUILD) #define CONFIG_SKIP_LOWLEVEL_INIT #endif diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index c15fb5fc3b..4b3691b407 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -10,9 +10,6 @@ #ifndef __CONFIG_VERSAL_MINI_H #define __CONFIG_VERSAL_MINI_H -/* #define CONFIG_SYS_DCACHE_OFF */ -#define CONFIG_SYS_ICACHE_OFF - #define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 #define CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h index 8fdff50528..a7ae30d4d7 100644 --- a/include/configs/xilinx_zynqmp_mini_emmc.h +++ b/include/configs/xilinx_zynqmp_mini_emmc.h @@ -12,7 +12,6 @@ #include <configs/xilinx_zynqmp_mini.h> -#define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x800000 diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h index aaa9eee009..692f6e5d1a 100644 --- a/include/configs/xilinx_zynqmp_mini_nand.h +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -12,7 +12,6 @@ #include <configs/xilinx_zynqmp_mini.h> -#define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_SDRAM_SIZE 0x1000000 #define CONFIG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000) diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 679ad0be3e..129af6e932 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -12,7 +12,6 @@ #include <configs/xilinx_zynqmp_mini.h> -#define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) #define CONFIG_SYS_MALLOC_LEN 0x2000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 523d4da56b..143dc7bb22 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -284,11 +284,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -/* Disable dcache for SPL just for sure */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_DCACHE_OFF -#endif - /* Address in RAM where the parameters must be copied by SPL. */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index e7a4d4108a..daf7d75d30 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -10,8 +10,6 @@ #define __CONFIG_ZYNQ_CSE_H #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_ICACHE_OFF #include <configs/zynq-common.h> diff --git a/include/spl.h b/include/spl.h index f09909e189..a9aaef345f 100644 --- a/include/spl.h +++ b/include/spl.h @@ -67,7 +67,7 @@ struct spl_image_info { u8 os; uintptr_t load_addr; uintptr_t entry_point; -#if CONFIG_IS_ENABLED(LOAD_FIT) +#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) void *fdt_addr; #endif u32 boot_device; diff --git a/tools/fit_check_sign.c b/tools/fit_check_sign.c index 62adc751cb..4528743792 100644 --- a/tools/fit_check_sign.c +++ b/tools/fit_check_sign.c @@ -70,10 +70,10 @@ int main(int argc, char **argv) usage(*argv); } - ffd = mmap_fdt(cmdname, fdtfile, 0, &fit_blob, &fsbuf, false); + ffd = mmap_fdt(cmdname, fdtfile, 0, &fit_blob, &fsbuf, false, true); if (ffd < 0) return EXIT_FAILURE; - kfd = mmap_fdt(cmdname, keyfile, 0, &key_blob, &ksbuf, false); + kfd = mmap_fdt(cmdname, keyfile, 0, &key_blob, &ksbuf, false, true); if (kfd < 0) return EXIT_FAILURE; diff --git a/tools/fit_common.c b/tools/fit_common.c index 9506390214..cdf987d3c1 100644 --- a/tools/fit_common.c +++ b/tools/fit_common.c @@ -41,13 +41,14 @@ int fit_check_image_types(uint8_t type) } int mmap_fdt(const char *cmdname, const char *fname, size_t size_inc, - void **blobp, struct stat *sbuf, bool delete_on_error) + void **blobp, struct stat *sbuf, bool delete_on_error, + bool read_only) { void *ptr; int fd; /* Load FIT blob into memory (we need to write hashes/signatures) */ - fd = open(fname, O_RDWR | O_BINARY); + fd = open(fname, (read_only ? O_RDONLY : O_RDWR) | O_BINARY); if (fd < 0) { fprintf(stderr, "%s: Can't open %s: %s\n", @@ -71,7 +72,9 @@ int mmap_fdt(const char *cmdname, const char *fname, size_t size_inc, } errno = 0; - ptr = mmap(0, sbuf->st_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); + ptr = mmap(0, sbuf->st_size, + (read_only ? PROT_READ : PROT_READ | PROT_WRITE), MAP_SHARED, + fd, 0); if ((ptr == MAP_FAILED) || (errno != 0)) { fprintf(stderr, "%s: Can't read %s: %s\n", cmdname, fname, strerror(errno)); diff --git a/tools/fit_common.h b/tools/fit_common.h index 9e09624f64..1e81d4c68b 100644 --- a/tools/fit_common.h +++ b/tools/fit_common.h @@ -32,9 +32,11 @@ int fit_check_image_types(uint8_t type); * @blobp: Returns pointer to FDT blob * @sbuf: File status information is stored here * @delete_on_error: true to delete the file if we get an error + * @read_only: true to open in read-only mode * @return 0 if OK, -1 on error. */ int mmap_fdt(const char *cmdname, const char *fname, size_t size_inc, - void **blobp, struct stat *sbuf, bool delete_on_error); + void **blobp, struct stat *sbuf, bool delete_on_error, + bool read_only); #endif /* _FIT_COMMON_H_ */ diff --git a/tools/fit_image.c b/tools/fit_image.c index 3b867e0656..5aca634b5e 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -33,7 +33,8 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc, void *ptr; int ret = 0; - tfd = mmap_fdt(params->cmdname, tmpfile, size_inc, &ptr, &sbuf, true); + tfd = mmap_fdt(params->cmdname, tmpfile, size_inc, &ptr, &sbuf, true, + false); if (tfd < 0) return -EIO; @@ -41,7 +42,8 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc, struct stat dest_sbuf; destfd = mmap_fdt(params->cmdname, params->keydest, size_inc, - &dest_blob, &dest_sbuf, false); + &dest_blob, &dest_sbuf, false, + false); if (destfd < 0) { ret = -EIO; goto err_keydest; @@ -420,7 +422,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) int images; int node; - fd = mmap_fdt(params->cmdname, fname, 0, &fdt, &sbuf, false); + fd = mmap_fdt(params->cmdname, fname, 0, &fdt, &sbuf, false, false); if (fd < 0) return -EIO; fit_size = fdt_totalsize(fdt); @@ -531,7 +533,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) int images; int node; - fd = mmap_fdt(params->cmdname, fname, 0, &old_fdt, &sbuf, false); + fd = mmap_fdt(params->cmdname, fname, 0, &old_fdt, &sbuf, false, false); if (fd < 0) return -EIO; fit_size = fdt_totalsize(old_fdt); diff --git a/tools/fit_info.c b/tools/fit_info.c index 45e0b310f7..b2642ec5b7 100644 --- a/tools/fit_info.c +++ b/tools/fit_info.c @@ -80,7 +80,7 @@ int main(int argc, char **argv) fprintf(stderr, "%s: Missing property name\n", *argv); usage(*argv); } - ffd = mmap_fdt(cmdname, fdtfile, 0, &fit_blob, &fsbuf, false); + ffd = mmap_fdt(cmdname, fdtfile, 0, &fit_blob, &fsbuf, false, false); if (ffd < 0) { printf("Could not open %s\n", fdtfile); |