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authorSimon Glass <sjg@chromium.org>2020-12-19 10:40:06 -0700
committerSimon Glass <sjg@chromium.org>2021-01-05 12:24:41 -0700
commita59f3d230eb995fd740656c0f33b3036efec40f0 (patch)
treeb26f5f307055e6c5cd944d21e154824e32505290
parent21303d1de7cabe1e2d4ebfe82425ca816a1394a6 (diff)
downloadu-boot-a59f3d230eb995fd740656c0f33b3036efec40f0.tar.gz
x86: coral: Remove unwanted nodes from SPL/TPL
Some devices are not needed in SPL/TPL. For TPL this causes the generation of unnecessary of-platadata structs. Make some adjustments to fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/dts/chromebook_coral.dts17
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index 3c8fdf2380..a846022095 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -102,12 +102,13 @@
};
cpus {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
#address-cells = <1>;
#size-cells = <0>;
cpu_0: cpu@0 {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
+ u-boot,dm-spl;
device_type = "cpu";
compatible = "intel,apl-cpu";
reg = <0>;
@@ -184,12 +185,14 @@
};
punit@0,1 {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
+ u-boot,dm-spl;
reg = <0x00000800 0 0 0 0>;
compatible = "intel,apl-punit";
};
gma@2,0 {
+ u-boot,dm-pre-proper;
reg = <0x00001000 0 0 0 0>;
compatible = "fsp-fb";
};
@@ -324,7 +327,8 @@
};
spi: fast-spi@d,2 {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
+ u-boot,dm-spl;
reg = <0x02006a10 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
@@ -335,7 +339,8 @@
fwstore_spi: spi-flash@0 {
#size-cells = <1>;
#address-cells = <1>;
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
+ u-boot,dm-spl;
reg = <0>;
compatible = "winbond,w25q128fw",
"jedec,spi-nor";
@@ -577,7 +582,7 @@
#size-cells = <0>;
u-boot,dm-pre-reloc;
cros_ec: cros-ec {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
compatible = "google,cros-ec-lpc";
reg = <0x204 1 0x200 1 0x880 0x80>;