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| author | Rasmus Villemoes <rasmus.villemoes@prevas.dk> | 2020-07-06 22:01:18 +0200 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2020-07-09 06:02:45 +0200 |
| commit | baed77913831325bf25dcc27ff72e1cd742a7cc3 (patch) | |
| tree | e4cc1bc90bb9eb7cd4a5470c2291ee7ca53c7dd0 | |
| parent | a3e36525a9b853c09d5f5726eff3641cd0cb5619 (diff) | |
| download | u-boot-baed77913831325bf25dcc27ff72e1cd742a7cc3.tar.gz | |
test: dm: rtc: add test of dm_rtc_read, dm_rtc_write
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| -rw-r--r-- | arch/sandbox/include/asm/rtc.h | 5 | ||||
| -rw-r--r-- | test/dm/rtc.c | 45 |
2 files changed, 50 insertions, 0 deletions
diff --git a/arch/sandbox/include/asm/rtc.h b/arch/sandbox/include/asm/rtc.h index 1fbfea7999..5bb032f59f 100644 --- a/arch/sandbox/include/asm/rtc.h +++ b/arch/sandbox/include/asm/rtc.h @@ -21,6 +21,11 @@ enum { REG_RESET = 0x20, + REG_AUX0 = 0x30, + REG_AUX1, + REG_AUX2, + REG_AUX3, + REG_COUNT = 0x80, }; diff --git a/test/dm/rtc.c b/test/dm/rtc.c index e072fd618b..ff1bc7b7f6 100644 --- a/test/dm/rtc.c +++ b/test/dm/rtc.c @@ -10,6 +10,7 @@ #include <log.h> #include <rtc.h> #include <asm/io.h> +#include <asm/rtc.h> #include <asm/test.h> #include <dm/test.h> #include <test/ut.h> @@ -130,6 +131,50 @@ static int dm_test_rtc_set_get(struct unit_test_state *uts) } DM_TEST(dm_test_rtc_set_get, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +static int dm_test_rtc_read_write(struct unit_test_state *uts) +{ + struct rtc_time time; + struct udevice *dev, *emul; + long old_offset; + u8 buf[4], reg; + + ut_assertok(uclass_get_device(UCLASS_RTC, 0, &dev)); + + memcpy(buf, "car", 4); + ut_assertok(dm_rtc_write(dev, REG_AUX0, buf, 4)); + memset(buf, '\0', sizeof(buf)); + ut_assertok(dm_rtc_read(dev, REG_AUX0, buf, 4)); + ut_asserteq(memcmp(buf, "car", 4), 0); + + reg = 'b'; + ut_assertok(dm_rtc_write(dev, REG_AUX0, ®, 1)); + memset(buf, '\0', sizeof(buf)); + ut_assertok(dm_rtc_read(dev, REG_AUX0, buf, 4)); + ut_asserteq(memcmp(buf, "bar", 4), 0); + + reg = 't'; + ut_assertok(dm_rtc_write(dev, REG_AUX2, ®, 1)); + memset(buf, '\0', sizeof(buf)); + ut_assertok(dm_rtc_read(dev, REG_AUX1, buf, 3)); + ut_asserteq(memcmp(buf, "at", 3), 0); + + ut_assertok(i2c_emul_find(dev, &emul)); + ut_assert(emul != NULL); + + old_offset = sandbox_i2c_rtc_set_offset(emul, false, 0); + ut_assertok(dm_rtc_get(dev, &time)); + + ut_assertok(dm_rtc_read(dev, REG_SEC, ®, 1)); + ut_asserteq(time.tm_sec, reg); + ut_assertok(dm_rtc_read(dev, REG_MDAY, ®, 1)); + ut_asserteq(time.tm_mday, reg); + + sandbox_i2c_rtc_set_offset(emul, true, old_offset); + + return 0; +} +DM_TEST(dm_test_rtc_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + /* Reset the time */ static int dm_test_rtc_reset(struct unit_test_state *uts) { |