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authorMarek Vasut <marex@denx.de>2019-11-26 09:39:09 +0100
committerStefano Babic <sbabic@denx.de>2019-12-06 13:57:42 +0100
commit5b97abab5540c6c611573523739a3226b8aaf31f (patch)
tree0378d706dc6eec608a44db7373ae3aec6e295d0e
parent7d84f4469f1e3956e8adf4c201df1b5fec435916 (diff)
downloadu-boot-5b97abab5540c6c611573523739a3226b8aaf31f.tar.gz
ARM: imx: vining2000: Enable DDR DRAM calibration
Enable DRAM calibration in SPL to improve behavior of the board in edge conditions of the thermal envelope of the board and make it even more stable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r--board/softing/vining_2000/vining_2000.c5
-rw-r--r--configs/vining_2000_defconfig1
2 files changed, 6 insertions, 0 deletions
diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c
index 9ac17f78e7..c6aee4ee2b 100644
--- a/board/softing/vining_2000/vining_2000.c
+++ b/board/softing/vining_2000/vining_2000.c
@@ -587,6 +587,11 @@ static void vining2000_spl_dram_init(void)
mx6sx_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);
+
+ /* Perform DDR DRAM calibration */
+ udelay(100);
+ mmdc_do_write_level_calibration(&sysinfo);
+ mmdc_do_dqs_calibration(&sysinfo);
}
void board_init_f(ulong dummy)
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index 4f9f538189..512c15baf8 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_SOFTING_VINING_2000=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y