HSD #14015124126: arm: socfpga: add device tree for n6010 board

Add device team for an Agilex SOCFGPA based n6010 PCIe board.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Yau Wai Gan <yau.wai.gan@intel.com>

3 files changed, 149 insertions, 0 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 57137ac714..07fd367d7e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -385,6 +385,7 @@ dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
 
 dtb-$(CONFIG_ARCH_SOCFPGA) +=				\
+	socfpga_agilex_n6010.dtb			\
 	socfpga_agilex_socdk.dtb			\
 	socfpga_agilex_socdk_nand.dtb                   \
 	socfpga_agilex_socdk_qspi.dtb			\
diff --git a/arch/arm/dts/socfpga_agilex_n6010-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_n6010-u-boot.dtsi
new file mode 100644
index 0000000000..4704fd43a4
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex_n6010-u-boot.dtsi
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * U-Boot additions
+ *
+ * Copyright (C) 2021 Intel Corporation <www.intel.com>
+ */
+
+#include "socfpga_agilex-u-boot.dtsi"
+
+/{
+	aliases {
+		spi0 = &qspi;
+		i2c0 = &i2c1;
+	};
+
+	memory {
+		/* 1GB */
+		reg = <0 0x00000000 0 0x40000000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		u-boot,spl-boot-order = &memory;
+	};
+};
+
+&binman {
+	/delete-node/ u-boot-script;
+	u-boot {
+		fit {
+			images {
+				/delete-node/ atf;
+
+				kernel_uboot {
+					description = "Linux Kernel";
+					type = "kernel";
+					arch = "arm64";
+					os = "linux";
+					compression = "none";
+					load = <0xb600000>;
+					entry = <0xb600000>;
+
+					kernel_uboot_blob: blob-ext {
+						filename = "Image";
+					};
+					hash {
+						algo = "md5";
+					};
+				};
+
+				kernel_fdt {
+					description = "Linux DTB";
+					type = "flat_dt";
+					arch = "arm64";
+					compression = "none";
+
+					kernel_uboot_fdt_blob: blob-ext {
+						filename = "linux.dtb";
+					};
+					hash {
+						algo = "md5";
+					};
+				};
+
+				kernel_ramdisk {
+					description = "Linux ramdisk";
+					type = "ramdisk";
+					arch = "arm64";
+					os = "linux";
+					compression = "none";
+
+					kernel_ramdisk_blob: blob-ext {
+						filename = "rootfs.cpio";
+					};
+					hash {
+						algo = "md5";
+					};
+				};
+			};
+
+			configurations {
+				conf {
+					/delete-property/ firmware;
+				};
+
+				linux_conf {
+					description = "Intel SoC64 FPGA";
+					kernel = "kernel_uboot";
+					fdt = "kernel_fdt";
+					ramdisk = "kernel_ramdisk";
+				};
+			};
+		};
+	};
+
+	/delete-node/ kernel;
+};
diff --git a/arch/arm/dts/socfpga_agilex_n6010.dts b/arch/arm/dts/socfpga_agilex_n6010.dts
new file mode 100644
index 0000000000..af2073cd15
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex_n6010.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Copyright (C) 2021, Intel Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+	model = "SoCFPGA Agilex n6010";
+
+	aliases {
+		serial0 = &uart0;
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		ethernet2 = &gmac2;
+	};
+
+	memory: memory {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the reg */
+		reg = <0 0 0 0>;
+	};
+
+	pll-gpios {
+		lol-gpios = <&porta 13 GPIO_ACTIVE_HIGH>;
+		ho-gpios = <&porta 14 GPIO_ACTIVE_HIGH>;
+	};
+
+	soc {
+		clocks {
+			osc1 {
+				clock-frequency = <25000000>;
+			};
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};