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author | Teik Heng Chong <teik.heng.chong@intel.com> | 2022-10-19 10:45:51 +0800 |
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committer | teikheng <97169727+teikheng@users.noreply.github.com> | 2022-12-09 17:36:31 +0800 |
commit | d71be7b21ea68c0eafbf33291ad1c3b07d474d68 (patch) | |
tree | 0c9d0602efadf23ab3d5891394beb29e0e2356a4 | |
parent | 3155f925a88d13766a789948eab1ab65659ee8d1 (diff) | |
download | u-boot-socfpga-d71be7b21ea68c0eafbf33291ad1c3b07d474d68.tar.gz |
HSD #15011972255: drivers: mtd: spi: Add support for GD55LB02GEBIR SPI NOR flash
Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI
configuration flash
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
-rw-r--r-- | drivers/mtd/spi/spi-nor-ids.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 4fe8b0d92c..6de0b1ee06 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -132,6 +132,11 @@ const struct flash_info spi_nor_ids[] = { INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + { + INFO("gd55lb02ge", 0xc8671c, 0, 64 * 1024, 4096, + SECT_4K | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ |