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* ddr: timing:G12A/G12B/TL1/TM2/A1 update LPDDR4_PHY_V_0_1_17 bl33 v2015 [2/3]zhiguang.ouyang2020-02-181-193/+928
| | | | | | | | | | | | | | | | | | | | | PD#SWPL-11622 Problem: none Solution: DDR_DRIVER_VERSION "LPDDR4_PHY_V_0_1_17" 20190704 1 update A1 DDR driver sync with g12a 2 repair A1 DDR autosize ,NIC400 bus limit A1 only support max size 512M 3 add psram patch for debug and test 4 combination A1 and g12 tl1 tm2 cmd ddr test code 5 add ddr fast boot chip id verify code Verify: test pass at u212,w400,x301 Change-Id: I29ee0206b1790b718426216a7795f273deaa263e Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
* ddr: driver:G12A/G12B/TL1/TM2 update LPDDR4_PHY_V_0_1_15 bl33 [2/3]zhiguang.ouyang2020-02-183-125/+10003
| | | | | | | | | | | | | | | | | | | | | | | | | PD#SWPL-8372 Problem: none. Solution: DDR_DRIVER_VERSION "LPDDR4_PHY_V_0_1_15" 20190506 1 add lpddr4 dram calibration refer resistor option 2 add support ddr fast boot mode frequency scan 3 add ddr4 bank group1 support 4 add bl2 ddr_fw version print 5 reparir TL1/TM2 4GB support ,limit ddr addtest <=3928M 6 bl33 enable fast boot, cmd_ddr_test_g12.c enable 7 clr dmc sticky reg when cold boot 8 u200 ddr4 clk change to 1320MHz Verify: test pass at T309,U200,W400. Change-Id: I6cc081f0991a3388f4fb28ad66b0b1dc4f55fa43 Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
* Revert "Showlogo: Add filename parameter"Dongjin Kim2020-02-101-13/+19
| | | | | | | This reverts commit 8aec17b7921cadfc3566f021b4d9ab33bb0bfe63. Change-Id: I40a595cd73db6c5e258c3891c9ebce99d05eaf1e Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* Showlogo: Add filename parameterRay2020-02-101-19/+13
| | | | Change-Id: I9112ab3a479b8432981d3d1c4c219929dc0273e0
* vout: support vout2 command for viu2 display [1/1]Evoke Zhang2020-02-101-1/+94
| | | | | | | | | | | | | | | | | | | PD#TV-5428 Problem: need viu2 display support Solution: add vout2 management you can use "vout2 output ${outputmode}" to enable vout2 display Verify: x301 Change-Id: Id47e430453ebdf7c32f41d271d6e926fd5cf0f6b Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com> Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* uboot: update ddr and emmc driver. [1/3]xiaobo gu2020-02-102-35488/+36907
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 6a2a443 storage: mmc/nand: support support to read saved ddr parameter [1/1] cb80c6c uboot: emmc: setup emmc hs400 debug environment in uboot [1/1] 9927af4 ddr: timing:G12A/G12B/TL1/TM2 update LPDDR4_PHY_V_0_1_14 bl33 [2/3] c9dfa59 ddr: driver:G12A/G12B/TL1 update LPDDR4_PHY_V_0_1_13 bl33 [2/3] ac463ed ddr: timing:G12A/G12B/TL1_update_LPDDR4_PHY_V_0_1_12_bl33 [2/3] 3fead4a dram: scramble: update scramble key config [2/2] dram: scramble: update scramble key config [2/2] PD#SWPL-3152 Problem: can not configure non-sec memory scramble key in uboot Solution: add config interface in ddr function Verity: test pass on u200/w400/x301 Change-Id: Ie987ecc336483518913dc3cb850cbe04d348720e Signed-off-by: xiaobo gu <xiaobo.gu@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com> ddr: timing:G12A/G12B/TL1_update_LPDDR4_PHY_V_0_1_12_bl33 [2/3] PD#SWPL-5973 Problem: none Solution: DDR_DRIVER_VERSION "LPDDR4_PHY_V_0_1_12" 20190128 1 reduice funciton ddr_init_soc_calculate_impedence_ctrl code size 2 modify ddr4 DqDqsRcvCntrl register for swith to extend vref range improve vref training 3 adjust 16bit lpddr4 dfi mode register and DMC_DRAM_DFI_CTRL register for 16bit test 4 change ddr scramble to after exter_ddrtest 5 add amlogic vref correction function 6 combine g12 rev-a and rev-b 7 repair tl1 ddr3 autosize function 8 config cfg_ddr_dqs=5 improve rank switch speed 9 change ddr4 rtt_park to 0 for ddr4 dqs level will increase vddq power 10 add fail_pass_ddr test method 11 disable asr only apd after ddrtest 12 add ddr_fast_boot function 13 add lpddr4 fast boot vt function Verify: test pass at x301 Change-Id: I19c0100cd08990854ab1f006d5e7060e7c2cc1bf Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com> ddr: driver:G12A/G12B/TL1 update LPDDR4_PHY_V_0_1_13 bl33 [2/3] PD#SWPL-7341 Problem: none. Solution: DDR_DRIVER_VERSION "LPDDR4_PHY_V_0_1_13" 20190417 1 add ddr_fast_boot data sha2 checksum 2 repair ddr reinit training all use for auto frequency scan 3 adjust tl1 bl2 stack link 4 reparir cs0 4GB support ,limit ddr addtest <=3928M 5 change tl1 board id to ddr id Verify: test pass at x301 and u200. Change-Id: I582fc6b67d6b565ef260b9bc4c144425ece95cc4 Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com> ddr: timing:G12A/G12B/TL1/TM2 update LPDDR4_PHY_V_0_1_14 bl33 [2/3] PD#SWPL-7880 Problem: none. Solution: DDR_DRIVER_VERSION "LPDDR4_PHY_V_0_1_14" 20190426 1 add soc window vref offset function 2 add usb_download_full test function 3 repair lpddr4 CA delay offset function 4 repair suspend resume test command 5 2400 ddr4 change cl from 16 to 18. compatibility new JEDEC 6 add dfi_mrl max value limmit 7 change lpddr4 init soc vref value Verify: test pass at T309,U200,W400. Change-Id: Ie92971f4a009511b72b22eea6dba56c461438d2b Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com> uboot: emmc: setup emmc hs400 debug environment in uboot [1/1] PD#SWPL-1265 Problem: HS400 enviroment is too complexity to debug Solution: setup HS400 environment in uboot Verify: verify on tl1_skt Change-Id: Iddc3ec8bdad496baf5792457d5417fe06ac3ce9b Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com> storage: mmc/nand: support support to read saved ddr parameter [1/1] PD#SWPL-5550 Problem: Implement to the function that can read ddr parameter which saved in reserved area. Solution: provide interface. Verify: tl1-x301 axg-s400 Change-Id: I68a0a83ac435ad6d4a11e01edc290aedae650941 Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Qiang Li <qiang.li@amlogic.com> Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
* ODROID-COMMON: Revert "fdt: do not padding 'reg' property if already defined ↵s922_9.0.0_64_20191118Dongjin Kim2019-09-111-9/+0
| | | | | | | | in DTS [1/2]" This reverts commit 97e50f66a7ad18a4bd825966be54cf4142b9b72b. Change-Id: Id8fb40b90f16c5479131770e4575af183f5234ed
* ODROID-COMMON: bootm: not to read FDT address when bootingDongjin Kim2019-09-071-12/+2
| | | | | | | | The address of FDT is already given by the command 'boot*' as its parameter, not neceesary to read from U-boot environment. Change-Id: If2c5f377e276400e463a9b0ec9028f2dac491494 Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* ODROID-C3/N2: config: update the boot command for SPItravis/odroidn2-49s922_9.0.0_20190627Dongjin Kim2019-06-242-1/+4
| | | | | Change-Id: I4fc3ef9871b4370094b4ff1e53c80c8e7c324348 Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* ODROID-C3/N2: cmd_source: use 'strncasecmp' for case insensetive string compareDongjin Kim2019-06-171-5/+2
| | | | | Change-Id: I89cd0b9a64ee3755a6dfaa2d2f7a5ba0d2b411cc Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* ODROID-N2: showlogo: replace 'fatload' to 'load'travis/odroidn2-31Dongjin Kim2019-05-291-2/+2
| | | | | Change-Id: I5aec6b78777080ea91f1ae346f7d6cdbd4478908 Signed-off-by: Dongjin Kim <tobetter@gmail.com>
* uboot: optimize abortboot_normal time [1/1]cheng.chen2019-05-161-1/+7
| | | | | | | | | | | | | | | | | | | | PD#SWPL-7583 Problem: abortboot_normal time cost 110ms Solution: 1.support new environment "us_delay_step=xx", when this variable is set and save then uboot will use it as xxms 2.change the default environment to speed up 2.1 add ""us_delay_step=1\0" \" to CONFIG_EXTRA_ENV_SETTINGS 2.2 take a reference with tl1_x301_v1.h Verify: test pass on tl1_x301 Change-Id: I12f1da8894c3216b2b7a268278a23f635fa41567 Signed-off-by: cheng.chen <cheng.chen@amlogic.com>
* fdt_overlay: reduce time consuming in reading dtbo part [1/1]Jiamin Ma2019-05-161-20/+36
| | | | | | | | | | | | | | | | | | PD#SWPL-7582 Problem: Time consumed in get_fdto_totalsize is about 230ms Solution: Only read necessary data not the whole dtbo partition. This can reduce time cosuming of get_fdto_totalsize from 230ms to 2.5ms Verify: Locally Change-Id: I87f657ed12a40228fea527b185798e99f219013f Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
* thermal: add tm2 thermal read and trim code [2/2]Huan Biao2019-05-161-7/+18
| | | | | | | | | | | | | | | | | | | | PD#SWPL-6368 Problem: add thermal for tm2 Solution: add thermal for tm2 Verify: test pass on tm2_skt Signed-off-by: Huan Biao <huan.biao@amlogic.com> Conflicts: common/cmd_cpu_temp.c Change-Id: I3a3eafedcf264f9c3e837cb7a4096410221d2e13
* usb_tool: support dump emmc mirror [1/1]Sam Wu2019-05-162-3/+21
| | | | | | | | | | | | | | | | | PD#SWPL-7007 Problem: support dump emmc mirror with usb tool Solution: pc command 'update.exe mread store 1 normal xxxx emmc.dump' will dump emmc from address 0 at size xxxx bytes, saved as emmc.dump in pc Verify: self test with u200, dump speed 8.53M/Sec Change-Id: I6221aebb257ed4302f8846c7c5aa57abc9884c85 Signed-off-by: Sam Wu <yihui.wu@amlogic.com>
* imgread: boot logo: sm1/g12a support diff logo [2/2]Sam Wu2019-05-161-65/+100
| | | | | | | | | | | | | | | | | PD#SWPL-6512 Problem: need show diff logo for SM1 and g12a/g12b Solution: if sm1, set env board_defined_bootup; first use sm1 logo if found, else use bootup.bmp Verify: test pass by u200/u212/u221 Change-Id: I3da7beb1edb240b36c78e29912e91bacbf85078d Signed-off-by: Sam Wu <yihui.wu@amlogic.com>
* jtag: add code to set up jtag pinmux [1/2]Yingyuan Zhu2019-05-161-0/+3
| | | | | | | | | | | | | | | | | | | PD#SWPL-5903 Problem: 1.bl30 sets the code of jtag pinmux to be platform-related, which is too messy and not conducive to later maintenance. 2.Jtag cannot be used in TXHD. Solution: Move the code to set up pinmux to bl33 for later maintenance, add code to set up jtag pinmux in TXHD. Verify: test pass on txhd-skt/g12a-u200/tl1-x309/txl-skt Change-Id: Ic25e04b8575b81cb6994d7a8d573d60ccdb7d23d Signed-off-by: Yingyuan Zhu <yingyuan.zhu@amlogic.com>
* ramdump: setup env for kernel file write [1/2]Tao Zeng2019-05-161-1/+62
| | | | | | | | | | | | | | | | | | | | PD#SWPL-6193 Problem: Write compressed data under uboot may cause jounal/block bitmap missmatch for kernel ext4 file system. Because ext4 file system version of uboot may not same as kernel side. Solution: Only set up base address and size of compressed data information as boot args for kernel. Let kernel write compressed data to persisit storage device. Verify: p212 Change-Id: I6831141d62b3626da198bc0470a02e1beddac351 Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
* storage: mmc/nand: support support to read saved ddr parameter [1/1]Liang Yang2019-05-162-4540/+4630
| | | | | | | | | | | | | | | | | | | | PD#SWPL-5550 Problem: Implement to the function that can read ddr parameter which saved in reserved area. Solution: provide interface. Verify: tl1-x301 axg-s400 Change-Id: I68a0a83ac435ad6d4a11e01edc290aedae650941 Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Qiang Li <qiang.li@amlogic.com> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
* ARCH64: A53: load freeRTOS by bootloader [1/1]fushan.zeng2019-05-161-1/+17
| | | | | | | | | | | | | | | | | | PD#SWPL-6166 Problem: image read fail Solution: check if it is rtos image Verify: g12b-w400 Test: pass Change-Id: I1859ed3cad136325a2006ef43fee12a168695d60 Signed-off-by: fushan.zeng <fushan.zeng@amlogic.com>
* ARCH64: A53: load freeRTOS by bootloader [1/1]fushan.zeng2019-05-161-4/+6
| | | | | | | | | | | | | | | | | | | | PD#SWPL-6166 Problem: load freeRTOS by bootloader. bootloader checks reserve memory fail because rtos does not use dtb Solution: do not check reserve memory for rtos image Verify: g12b-w400 Test: pass Change-Id: Icacbbde582c7ec593d1dc813b2ec75500e5b80c3 Signed-off-by: fushan.zeng <fushan.zeng@amlogic.com>
* bootm: check out_data NULL before use out_data->cmdline [2/2]Zhigang2019-05-161-7/+12
| | | | | | | | | | | | | | | | PD#TV-2975 Problem: uboot can not bootup when no data in vbmeta Solution: check out_data NULL before use out_data->cmdline Verify: Verifying on p212 Change-Id: I3632e53105dabf7d505fcc43501e9f3b265cebe4 Signed-off-by: Zhigang <zhigang.yu@amlogic.com>
* thermal: add sm1 thermal read and trim code [1/2]Huan Biao2019-05-161-0/+6
| | | | | | | | | | | | | | | | PD#SWPL-6071 Problem: add thermal for sm1 Solution: add thermal for sm1 Verify: test pass on sm1_skt Change-Id: I2d05fc1ebac12c1579d6c2e4f26e9e759cd95cd2 Signed-off-by: Huan Biao <huan.biao@amlogic.com>
* AVB: failed to boot when AVB + A/B update + vbmeta with disabled flag [1/1]Matthew Shyu2019-05-161-2/+19
| | | | | | | | | | | | | | | | | | | PD# SWPL-6034 Problem: Failed to boot when AVB is enabled with A/B update due to recovery partition is missing When disabled flag is set, AVB2 will verify all partition requested even the partition is not there. Solution: Verify recovery partition only on non-A/B platforms Verify: Verified on U212 Change-Id: I84d2fb5f04cb5842fa63be3d2d64f0df73268772 Signed-off-by: Matthew Shyu <matthew.shyu@amlogic.com>
* fdt: do not padding 'reg' property if already defined in DTS [1/2]Tao Zeng2019-05-161-0/+9
| | | | | | | | | | | | | | | | | | | PD#SWPL-5301 Problem: When open NUMA config, kernel will always get a fixed memory range from uboot, it set memory to real DDR size, which may conflict with memory range defined in DTS Solution: Check if reg property is already defined in DTS, if defined, not replace it Verify: P212 Change-Id: I593455c590ba7874db6fae3cbc7ef75be6712f04 Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
* uboot: emmc: setup emmc hs400 debug environment in uboot [1/1]Ruixuan Li2019-05-161-1/+606
| | | | | | | | | | | | | | | | PD#SWPL-1265 Problem: HS400 enviroment is too complexity to debug Solution: setup HS400 environment in uboot Verify: verify on tl1_skt Change-Id: Iddc3ec8bdad496baf5792457d5417fe06ac3ce9b Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
* multi-dt: update dtb parse flow [1/1]xiaobo gu2019-05-161-7/+26
| | | | | | | | | | | | | | | | PD#TV-2731 Problem: multiple dtb with gzip format parse crash Solution: update parse flow and dtb max define Verify: test pass on p241/w400 Change-Id: I306847249c92d3215cc1a1afd7b24eb08d512274 Signed-off-by: xiaobo gu <xiaobo.gu@amlogic.com>
* factoryBurn: mmc: support upgrade whole mmcSam Wu2019-05-162-3/+46
| | | | | | | | | | | | | | | | | | PD#SWPL-4992 Problem: customer requires flashing whole mmc in bootloader mode, rather than enter recovery mode which has selinux issue. Solution: support "sdc_update/usb_update 1 emmc.bin" in bootloader mode support "update partition 1 emmc.bin" in bootloader mode Verify: test pass by project Change-Id: Ied3eda01a1840d3242fa3598bd88de30c8468f6c Signed-off-by: Sam Wu <yihui.wu@amlogic.com>
* BL33: GXL: script tool support android 9.0 [3/3]Haixiang Bao2019-05-161-1/+7
| | | | | | | | | | | | | | | | | | PD#OTT-2130 Problem: VTS certification need check the raw android 9.0 file header. Script signing tool will encrypt the android 9.0 file header for signing. Solution: Implement a new solution and leave the android 9.0 header unchanged for VTS Verify: secure boot check of android 9.0 image boot pass. defend key check pass. Change-Id: Ifa0d76ce84ff492387154efae77336ea1d7f5dd0 Signed-off-by: Haixiang Bao <haixiang.bao@amlogic.com>
* dt: update aml multi dt gzip process flow [1/1]xiaobo gu2019-05-161-20/+4
| | | | | | | | | | | | | | | | | PD#SWPL-4293 Problem: gzip multi dt will crash during usb burning Solution: update gzip process flow Verify: test pass on p241 with gzip dt img test pass on p212 with single dt Change-Id: I1b2232cdfd367e9b8695c7d93caa23d15f0e26cf Signed-off-by: xiaobo gu <xiaobo.gu@amlogic.com>
* ringmsr: add ringmsr for g12b revb [1/1]Huan Biao2019-05-161-2/+4
| | | | | | | | | | | | | | | | PD#SWPL-4888 Problem: g12b revb no ringmsr. Solution: add g12b revb ringmsr cmd. Verify: test on g12b skt. Change-Id: I3c81de8673e06532782aa963f2d95ad5018e77fa Signed-off-by: Huan Biao <huan.biao@amlogic.com>
* tvconfig: support custome tvconfig path [1/1]Evoke Zhang2019-05-161-1/+8
| | | | | | | | | | | | | | | | | PD#TV-2579 Problem: need custome tvconfig path Solution: add custome tvconfig path support with uboot env "model_path", if null, use default path. Verify: x301 Change-Id: I3c1656d1e0541081efb5b598dcf2a22236acc2da Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* ramdump: check environment before do ext4 write [1/1]Tao Zeng2019-05-161-20/+11
| | | | | | | | | | | | | | | | | | | | | PD#TV-1924 Problem: Currently ext4 write in uboot is not very robust enough, it's write can cause /data/ partition can't be recovery if ramdump triggered 2 times and second compress data is small than 1st one. Solution: Check environment "ramdump_enable" first, if it is not equal to "1" Then not do ramdump. So if you want to enable it, set following command first: setenv ramdump_enable 1; save; reset Verify: tl1_x301_v1 Change-Id: I133a533b3a311461f206b74a3b8a5840d454a3af Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
* tvconfig: add tcon bin data management [1/1]Evoke Zhang2019-05-169-5/+331
| | | | | | | | | | | | | | | | PD#SWPL-3986 Problem: need dynamicly switch tcon bin data support Solution: add tcon bin data path management in tvconfig Verify: x301 Change-Id: I52cdf28dc5d1b21656e02afeea430c7e439c5205 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* boottime:G12B: G12B_W400 boottime optimization [1/1]cheng.chen2019-05-161-4/+4
| | | | | | | | | | | | | | | | | PD#SWPL-3711 Problem: G12B_W400 boottime need optimization Solution: 1.reduce dram init time by correcting spelling to pixel_clk in bl33 2.change the reading times and cycle of the R1P1_TSENSOR Verify: G12B_W400 Change-Id: Ifde69022b99d7d0cab66a7b75b2b42149e7894a1 Signed-off-by: cheng.chen <cheng.chen@amlogic.com>
* lcd: tcon: add chpi bbc init support for tl1 [1/1]Evoke Zhang2019-05-161-18/+83
| | | | | | | | | | | | | | | | PD#SWPL-3739 Problem: need bbc flow to init channel for tcon chpi Solution: add bbc flow support Verify: x301 Change-Id: Id856264abc283de9f2ae07252540619ff0b431ca Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* ramdump: support ramdump for tl1_x301 [3/4]Tao Zeng2019-05-163-27/+57
| | | | | | | | | | | | | | | | | PD#TV-1924 Problem: On TL1, ramdump is not enabled. Solution: Add ramdump support for TL1 chips in BL33. Now dump data is directely written to /data/ partition under BL33. Verify: tl1_x301_v1 Change-Id: I4ed7ecbb2ee4a65d44830d44729821d66dd9c37b Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
* tvconfig: correct pixel_clk spelling mistake [1/2]Evoke Zhang2019-05-162-12/+12
| | | | | | | | | | | | | | | | PD#SWPL-3910 Problem: pixel_clk is wrong spelling as pixle_clk Solution: correct spelling to pixel_clk Verify: r311 Change-Id: Ica51d4f99d6ee8b5d28fcb9c2f98683c555d50b8 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* BL33: GXL/G12A/B/TXLX: script signing tool support defendkey [4/5]Haixiang Bao2019-05-161-2/+0
| | | | | | | | | | | | | | | | | | PD#SWPL-3204 Problem: Script signing tool not support upgrade check (defendkey) Solution: add upgrade control block to support uboot/kernel/recovery/dtb upgrade check feature Verify: gxl/txlx/g12a/g12b skt board verify pass Change-Id: I4d8c871c0a1936f2f4d6f1e236de6e0e4c44e210 Signed-off-by: Haixiang Bao <haixiang.bao@amlogic.com>
* ubootenv: tl1: fixed can not run recovery [1/1]Zhigang2019-05-161-1/+1
| | | | | | | | | | | | | | | | PD#TV-1638 Problem: can not run into recovery by run recovery_from_flash Solution: add fs_type for run boot and run recovery Verify: passed on tl1_x301_v1 Change-Id: Icf450c44a3ceb872b4bb655007572ab549ad29b4 Signed-off-by: Zhigang <zhigang.yu@amlogic.com>
* ini: enable model_ini function for tvconfig [1/1]Evoke Zhang2019-05-163-3/+8
| | | | | | | | | | | | | | | | | PD#SWPL-2761 Problem: x301 & t309 not support tvconfig yet Solution: 1. enable config CONFIG_CMD_INI 2. add LCD_P2P support for unifykey parse Verify: x301 Change-Id: Ib12b8dd94f9304cc2aae8f589143b912c59bcc79 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* lcd: update p2p config and pll setting for tl1 [1/1]Evoke Zhang2019-05-161-8/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | PD#SWPL-3108 Problem: tcon pll don't support spread spectrum yet Solution: 1. add p2p config parameters 2. enable tl1 clk parameters auto generate 3. add tl1 tcon_pll spread spectrum support 4. update clk spread spectrum debug cmd: set ss_level(hex val): lcd ss level <val> set ss_freq(hex val): lcd ss freq <val> set ss_mode(hex val): lcd ss mode <val> set ss advance(hex val, [15:12]=mode, [11:8]=freq, [7:0]=level): lcd ss set <val> show ss_level, ss_freq, ss_mode: lcd ss get Verify: x301 Change-Id: I04961bffeda6d5c25b2eac261af0efa08276e2ab Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* securebootv3: defenkey: temp disable defendkey as not support [1/1]Sam Wu2019-05-161-0/+2
| | | | | | | | | | | | | | | | PD#SWPL-1855 Problem: enable defendkey in sb v3 will invoke kernel v2 defendkey Solution: temp disable it before kernel v3 defendkey ok without defendkey, will not check part table and upgrade directly Verify: test pass in g12a/gxl Change-Id: I0d20401a8f5cc3631586cb460b92f1ecf782e0e3
* thermal: tl1: add temp and trim cmd for third sensor [2/2]yunhua wei2019-05-161-7/+160
| | | | | | | | | | | | | | | | PD#SWPL-2608 Problem: no temp get and trim cmd for third sensor Solution: modify temp cmd Verify: test pass on tl1_skt Change-Id: I2cee5e440d8b9133b9eff3158bc603de731f150f Signed-off-by: Yunhua Wei <yunhua.wei@amlogic.com>
* lcd: update p2p config [1/1]Evoke Zhang2019-05-161-1/+32
| | | | | | | | | | | | | | | | PD#172587 Problem: p2p not work Solution: update p2p config Verify: skt Change-Id: I76b45fcf2258273a18e93cedfbf0b7fb50debb76 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* lcd: lcd: add tl1 support [1/1]Evoke Zhang2019-05-161-1/+1
| | | | | | | | | | | | | | | | PD#172587 Problem: tl1 is a new chip Solution: add tl1 support Verify: tl1 pxp Change-Id: I0abe11bf02680fc518254eeda2bebd413e6c5a66 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
* T962X2: ring:add chip freq test efuse info get [2/2]yunhua wei2019-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | PD#TV-621 Problem: tl1: no osc ring efuse info Solution: add tl1 osc ring efuse info get cmd Verify: T962X2_X301 Signed-off-by: Yunhua Wei <yunhua.wei@amlogic.com> Conflicts: common/cmd_clkmsr.c Change-Id: I0c2b73ce9a0f2a3936a1de0b4cd337d2b182d1dd
* thermal: tl1: add temp get and trim cmd for two sensor [2/2]Huan Biao2019-05-161-2/+11
| | | | | | | | | | | | | | | | PD#172587 Problem: no temp get and trim cmd Solution: modify temp cmd Verify: test pass on tl1_skt Change-Id: I654583a9cc94105af355d48466d361c1359de5a8 Signed-off-by: Huan Biao <huan.biao@amlogic.com>
* Merge "ODROID-N2: display: Increase edid read retry to secure stable ↵Joy Cho2019-04-012-2/+2
|\ | | | | | | operation of display units" into odroidn2-v2015.01
| * ODROID-N2: display: Increase edid read retry to secure stable operation of ↵Joy Cho2019-03-292-2/+2
| | | | | | | | | | | | display units Change-Id: I095e6c32cd0c7e30727b377ed8f65e7057c38552
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