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author | Portisch <hugo.portisch@yahoo.de> | 2019-05-21 11:19:29 +0000 |
---|---|---|
committer | Dongjin Kim <tobetter@gmail.com> | 2020-02-13 17:13:40 +0900 |
commit | fabbf044d38e842d03c06b0b9ff26a64d575c12e (patch) | |
tree | 5a27a730f50ffc88ae24ec1cc70ffd4a1874abc8 | |
parent | 02188034ee1b225d1ea238ac16c2f9bc7af04022 (diff) | |
download | u-boot-odroid-c1-fabbf044d38e842d03c06b0b9ff26a64d575c12e.tar.gz |
g12a/g12b: scp_remote: rename RC6 to RC6A and add RC6 ir protocol
Change-Id: I812b186b13b619988b0c0731502d47f2b135c289
-rw-r--r-- | arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c | 38 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c | 38 |
2 files changed, 52 insertions, 24 deletions
diff --git a/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c b/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c index b9e7dc52a3..7cd5eca454 100644 --- a/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c +++ b/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c @@ -196,17 +196,30 @@ static const reg_remote RDECODEMODE_RC5[] = { }; static const reg_remote RDECODEMODE_RC6[] = { - {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)125 << 0)},//rc6 leader 1700us,20* timebase - {AO_MF_IR_DEC_LDR_IDLE, 50 << 16 | 38 << 0}, // leader idle 800us - {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat - {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 1500us - {AO_MF_IR_DEC_REG0, 3 << 28 | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame - {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 2500us - {AO_MF_IR_DEC_REG1, 0xa440}, // boby long decode (8-13) //framn len = 24bit - /*it may get the wrong customer value and key value from register if the value is set to 0x4,so the register value must set to 0x104 */ - {AO_MF_IR_DEC_REG2, 0x109}, - {AO_MF_IR_DEC_DURATN2, ((28 << 16) | (16 << 0))}, - {AO_MF_IR_DEC_DURATN3, ((51 << 16) | (38 << 0))}, + {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)120 << 0)}, // rc6 leader 2666us,20* timebase + {AO_MF_IR_DEC_LDR_IDLE, 55 << 16 | 38 << 0}, // leader idle 889us + {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat + {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 889us + {AO_MF_IR_DEC_REG0, (3 << 28) | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame + {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 1778us + {AO_MF_IR_DEC_REG1, ((1 << 15) | (20 << 8) | (1 << 6))}, // frame len = 21bit + {AO_MF_IR_DEC_REG2, (1 << 8) | 0x9}, // rc6 protocol + {AO_MF_IR_DEC_DURATN2, (28 << 16) | (16 << 0)}, // short bit pulse 444us + {AO_MF_IR_DEC_DURATN3, (51 << 16) | (38 << 0)}, // long bit pulse 889us, + {CONFIG_END, 0} +}; + +static const reg_remote RDECODEMODE_RC6A[] = { + {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)120 << 0)}, // rc6 leader 2666us,20* timebase + {AO_MF_IR_DEC_LDR_IDLE, 55 << 16 | 38 << 0}, // leader idle 889us + {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat + {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 889us + {AO_MF_IR_DEC_REG0, (3 << 28) | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame + {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 1778us + {AO_MF_IR_DEC_REG1, ((1 << 15) | (36 << 8) | (1 << 6))}, // frame len = 37bit + {AO_MF_IR_DEC_REG2, (1 << 8) | 0x9}, // rc6 protocol + {AO_MF_IR_DEC_DURATN2, (28 << 16) | (16 << 0)}, // short bit pulse 444us + {AO_MF_IR_DEC_DURATN3, (51 << 16) | (38 << 0)}, // long bit pulse 889us {CONFIG_END, 0} }; @@ -275,12 +288,13 @@ static const reg_remote *remoteregsTab[] = { RDECODEMODE_TOSHIBA, RDECODEMODE_RCA, RDECODEMODE_RC5, - RDECODEMODE_RC6, + RDECODEMODE_RC6A, RDECODEMODE_NEC_TOSHIBA_2IN1, RDECODEMODE_NEC_RCA_2IN1, RDECODEMODE_RCMM, RDECODEMODE_NEC_RC5_2IN1, RDECODEMODE_NEC_RC6_2IN1, + RDECODEMODE_RC6, RDECODEMODE_SOFTWARE_DECODE }; diff --git a/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c b/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c index b9e7dc52a3..7cd5eca454 100644 --- a/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c +++ b/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c @@ -196,17 +196,30 @@ static const reg_remote RDECODEMODE_RC5[] = { }; static const reg_remote RDECODEMODE_RC6[] = { - {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)125 << 0)},//rc6 leader 1700us,20* timebase - {AO_MF_IR_DEC_LDR_IDLE, 50 << 16 | 38 << 0}, // leader idle 800us - {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat - {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 1500us - {AO_MF_IR_DEC_REG0, 3 << 28 | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame - {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 2500us - {AO_MF_IR_DEC_REG1, 0xa440}, // boby long decode (8-13) //framn len = 24bit - /*it may get the wrong customer value and key value from register if the value is set to 0x4,so the register value must set to 0x104 */ - {AO_MF_IR_DEC_REG2, 0x109}, - {AO_MF_IR_DEC_DURATN2, ((28 << 16) | (16 << 0))}, - {AO_MF_IR_DEC_DURATN3, ((51 << 16) | (38 << 0))}, + {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)120 << 0)}, // rc6 leader 2666us,20* timebase + {AO_MF_IR_DEC_LDR_IDLE, 55 << 16 | 38 << 0}, // leader idle 889us + {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat + {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 889us + {AO_MF_IR_DEC_REG0, (3 << 28) | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame + {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 1778us + {AO_MF_IR_DEC_REG1, ((1 << 15) | (20 << 8) | (1 << 6))}, // frame len = 21bit + {AO_MF_IR_DEC_REG2, (1 << 8) | 0x9}, // rc6 protocol + {AO_MF_IR_DEC_DURATN2, (28 << 16) | (16 << 0)}, // short bit pulse 444us + {AO_MF_IR_DEC_DURATN3, (51 << 16) | (38 << 0)}, // long bit pulse 889us, + {CONFIG_END, 0} +}; + +static const reg_remote RDECODEMODE_RC6A[] = { + {AO_MF_IR_DEC_LDR_ACTIVE, ((unsigned)210 << 16) | ((unsigned)120 << 0)}, // rc6 leader 2666us,20* timebase + {AO_MF_IR_DEC_LDR_IDLE, 55 << 16 | 38 << 0}, // leader idle 889us + {AO_MF_IR_DEC_LDR_REPEAT, 145 << 16 | 125 << 0}, // leader repeat + {AO_MF_IR_DEC_BIT_0, 51 << 16 | 38 << 0}, // logic '0' or '00' 889us + {AO_MF_IR_DEC_REG0, (3 << 28) | (0xFA0 << 12) | 0x13}, // sys clock boby time.base time = 20 body frame + {AO_MF_IR_DEC_STATUS, (94 << 20) | (82 << 10)}, // logic '1' or '01' 1778us + {AO_MF_IR_DEC_REG1, ((1 << 15) | (36 << 8) | (1 << 6))}, // frame len = 37bit + {AO_MF_IR_DEC_REG2, (1 << 8) | 0x9}, // rc6 protocol + {AO_MF_IR_DEC_DURATN2, (28 << 16) | (16 << 0)}, // short bit pulse 444us + {AO_MF_IR_DEC_DURATN3, (51 << 16) | (38 << 0)}, // long bit pulse 889us {CONFIG_END, 0} }; @@ -275,12 +288,13 @@ static const reg_remote *remoteregsTab[] = { RDECODEMODE_TOSHIBA, RDECODEMODE_RCA, RDECODEMODE_RC5, - RDECODEMODE_RC6, + RDECODEMODE_RC6A, RDECODEMODE_NEC_TOSHIBA_2IN1, RDECODEMODE_NEC_RCA_2IN1, RDECODEMODE_RCMM, RDECODEMODE_NEC_RC5_2IN1, RDECODEMODE_NEC_RC6_2IN1, + RDECODEMODE_RC6, RDECODEMODE_SOFTWARE_DECODE }; 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