diff options
author | Dongjin Kim <tobetter@gmail.com> | 2019-03-12 01:12:45 +0900 |
---|---|---|
committer | Dongjin Kim <tobetter@gmail.com> | 2020-02-10 22:49:50 +0900 |
commit | c40ba264087c845df48184eba76824b65f590e10 (patch) | |
tree | d5e9040bd6edb2af02cc3d13303a779d3d34ff31 | |
parent | 4c3901f76d04197dfb920ab95348945b6539b0a2 (diff) | |
download | u-boot-odroid-c1-c40ba264087c845df48184eba76824b65f590e10.tar.gz |
ODROID-C4: scp_task: add to support Wake On Lan enable
Change-Id: Ie880f1bf14ab61581c069d573b338bbc541a669c
-rw-r--r-- | arch/arm/cpu/armv8/g12a/firmware/scp_task/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/g12a/firmware/scp_task/user_task.c | 14 | ||||
-rw-r--r-- | board/hardkernel/odroidc4/firmware/scp_task/pwr_ctrl.c | 52 |
3 files changed, 47 insertions, 23 deletions
diff --git a/arch/arm/cpu/armv8/g12a/firmware/scp_task/Makefile b/arch/arm/cpu/armv8/g12a/firmware/scp_task/Makefile index 257f08c7ec..82f31b88bb 100644 --- a/arch/arm/cpu/armv8/g12a/firmware/scp_task/Makefile +++ b/arch/arm/cpu/armv8/g12a/firmware/scp_task/Makefile @@ -45,6 +45,10 @@ CFLAGS=$(CFLAGS_CPU) $(CFLAGS_WARN) $(VPATH_LIST:%=-I%) $(CFLAGS_INCLUDE) $(CFLA ASFLAGS= -gdwarf2 -mcpu=$(ARM_CPU) DUMP_FLAGS = -D -x +ifdef CONFIG_ODROID_COMMON +CFLAGS += -DCONFIG_ODROID_COMMON +endif + LDFLAGS=-Bstatic #LDFLAGS+=$(LD_LIB_PATH_ARM:%=-L%) -lm -lc -lgcc diff --git a/arch/arm/cpu/armv8/g12a/firmware/scp_task/user_task.c b/arch/arm/cpu/armv8/g12a/firmware/scp_task/user_task.c index 088a083d95..451a645432 100644 --- a/arch/arm/cpu/armv8/g12a/firmware/scp_task/user_task.c +++ b/arch/arm/cpu/armv8/g12a/firmware/scp_task/user_task.c @@ -36,6 +36,10 @@ enum scpi_client_id { SCPI_CL_POWER, SCPI_CL_THERMAL, SCPI_CL_REMOTE, + SCPI_CL_LED_TIMER, +#if defined(CONFIG_ODROID_COMMON) + SCPI_CL_WOL, +#endif SCPI_MAX, }; @@ -146,6 +150,11 @@ void high_task(void) } extern unsigned int usr_pwr_key; + +#if defined(CONFIG_ODROID_COMMON) +extern unsigned int enable_wol; +#endif + void process_low_task(unsigned command) { unsigned *pcommand = @@ -157,6 +166,11 @@ void process_low_task(unsigned command) if ((command >> 16) == SCPI_CL_REMOTE) { usr_pwr_key = *(pcommand + 2);/*tx_size locates at *(pcommand + 1)*/ dbg_print("pwr_key=",usr_pwr_key); +#if defined(CONFIG_ODROID_COMMON) + } else if ((command >> 16) == SCPI_CL_WOL) { + enable_wol = *(pcommand + 2); + dbg_print("wake-on-lan = ", enable_wol); +#endif } } } diff --git a/board/hardkernel/odroidc4/firmware/scp_task/pwr_ctrl.c b/board/hardkernel/odroidc4/firmware/scp_task/pwr_ctrl.c index 7b782a5700..35b4efd2d8 100644 --- a/board/hardkernel/odroidc4/firmware/scp_task/pwr_ctrl.c +++ b/board/hardkernel/odroidc4/firmware/scp_task/pwr_ctrl.c @@ -23,6 +23,8 @@ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +unsigned int enable_wol = 0; /* disable Wake-On-Lan by default*/ + static void set_vddee_voltage(unsigned int target_voltage) { unsigned int to; @@ -46,10 +48,12 @@ static void power_off_at_24M(unsigned int suspend_from) writel(readl(PREG_PAD_GPIO3_EN_N) & (~(1 << 8)), PREG_PAD_GPIO3_EN_N); writel(readl(PERIPHS_PIN_MUX_C) & (~(0xf)), PERIPHS_PIN_MUX_C); - /*set test_n low to power off vcck & vcc 3.3v*/ - writel(readl(AO_GPIO_O) & (~(1 << 31)), AO_GPIO_O); - writel(readl(AO_GPIO_O_EN_N) & (~(1 << 31)), AO_GPIO_O_EN_N); - writel(readl(AO_RTI_PIN_MUX_REG1) & (~(0xf << 28)), AO_RTI_PIN_MUX_REG1); + if (!enable_wol) { + /*set test_n low to power off vcck_b & vcc 3.3v*/ + writel(readl(AO_GPIO_O) & (~(1 << 31)), AO_GPIO_O); + writel(readl(AO_GPIO_O_EN_N) & (~(1 << 31)), AO_GPIO_O_EN_N); + writel(readl(AO_RTI_PIN_MUX_REG1) & (~(0xf << 28)), AO_RTI_PIN_MUX_REG1); + } /*step down ee voltage*/ set_vddee_voltage(CONFIG_VDDEE_SLEEP_VOLTAGE); @@ -60,11 +64,13 @@ static void power_on_at_24M(unsigned int suspend_from) /*step up ee voltage*/ set_vddee_voltage(CONFIG_VDDEE_INIT_VOLTAGE); - /*set test_n low to power on vcck & vcc 3.3v*/ - writel(readl(AO_GPIO_O) | (1 << 31), AO_GPIO_O); - writel(readl(AO_GPIO_O_EN_N) & (~(1 << 31)), AO_GPIO_O_EN_N); - writel(readl(AO_RTI_PIN_MUX_REG1) & (~(0xf << 28)), AO_RTI_PIN_MUX_REG1); - _udelay(100); + if (!enable_wol) { + /*set test_n high to power on vcck_b & vcc 3.3v*/ + writel(readl(AO_GPIO_O) | (1 << 31), AO_GPIO_O); + writel(readl(AO_GPIO_O_EN_N) & (~(1 << 31)), AO_GPIO_O_EN_N); + writel(readl(AO_RTI_PIN_MUX_REG1) & (~(0xf << 28)), AO_RTI_PIN_MUX_REG1); + _udelay(100); + } /*set gpioH_8 low to power on vcc 5v*/ writel(readl(PREG_PAD_GPIO3_EN_N) | (1 << 8), PREG_PAD_GPIO3_EN_N); @@ -96,17 +102,18 @@ void get_wakeup_source(void *response, unsigned int suspend_from) gpio->trig_type = GPIO_IRQ_FALLING_EDGE; p->gpio_info_count = ++i; - /*Eth:GPIOZ_14*/ - gpio = &(p->gpio_info[i]); - gpio->wakeup_id = ETH_PHY_GPIO_SRC; - gpio->gpio_in_idx = GPIOZ_14; - gpio->gpio_in_ao = 0; - gpio->gpio_out_idx = -1; - gpio->gpio_out_ao = -1; - gpio->irq = IRQ_GPIO1_NUM; - gpio->trig_type = GPIO_IRQ_FALLING_EDGE; - p->gpio_info_count = ++i; - + if (enable_wol) { + /*Eth:GPIOZ_14*/ + gpio = &(p->gpio_info[i]); + gpio->wakeup_id = ETH_PHY_GPIO_SRC; + gpio->gpio_in_idx = GPIOZ_14; + gpio->gpio_in_ao = 0; + gpio->gpio_out_idx = -1; + gpio->gpio_out_ao = -1; + gpio->irq = IRQ_GPIO1_NUM; + gpio->trig_type = GPIO_IRQ_FALLING_EDGE; + p->gpio_info_count = ++i; + } } extern void __switch_idle_task(void); @@ -149,14 +156,13 @@ static unsigned int detect_key(unsigned int suspend_from) } #endif -#if 0 - if (irq[IRQ_GPIO1] == IRQ_GPIO1_NUM) { + if (enable_wol && (irq[IRQ_GPIO1] == IRQ_GPIO1_NUM)) { irq[IRQ_GPIO1] = 0xFFFFFFFF; if (!(readl(PREG_PAD_GPIO4_I) & (0x01 << 14)) && (readl(PREG_PAD_GPIO4_EN_N) & (0x01 << 14))) exit_reason = ETH_PHY_GPIO; } -#endif + if (exit_reason) break; else |