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authorBen James <something_for_the_pain@hotmail.com>2010-09-04 17:38:32 +0100
committerBastien Nocera <hadess@hadess.net>2010-09-30 17:21:07 +0100
commit4272b8a01ae513fc67833163507bd8b7e6f15362 (patch)
tree51544aed4c861899ad980b3f094f651c5ce6753c /tests/test.sv
parent8867fb840ae698be0c800218efd7aaa23492ef83 (diff)
downloadshared-mime-info-4272b8a01ae513fc67833163507bd8b7e6f15362.tar.gz
Add SystemVerilog header/source mime and tests
Also changed Verilog and VHDL from "document" to "source code" https://bugs.freedesktop.org/show_bug.cgi?id=30012
Diffstat (limited to 'tests/test.sv')
-rw-r--r--tests/test.sv10
1 files changed, 10 insertions, 0 deletions
diff --git a/tests/test.sv b/tests/test.sv
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index 00000000..b8d79a29
--- /dev/null
+++ b/tests/test.sv
@@ -0,0 +1,10 @@
+
+`include "test.svh"
+
+function void
+ someclass::something();
+
+ $display("Something called!");
+
+endfunction : something
+