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authorAllan Sandfeld Jensen <allan.jensen@digia.com>2014-10-28 10:04:13 +0100
committerAllan Sandfeld Jensen <allan.jensen@theqtcompany.com>2014-10-30 11:50:39 +0100
commit7296068ce76be5e0c33fd70918688f7ffb24bc72 (patch)
treec99035d9b1e7ba5fda22c9d6c8413eda2bca13c4 /Source/WTF/wtf/Platform.h
parent4ab0f495a26ae18cb7be7a4ddb4c411eba06b398 (diff)
downloadqtwebkit-7296068ce76be5e0c33fd70918688f7ffb24bc72.tar.gz
Do not use unaligned access when disabled
Use the GCC feature defines to check for support for ARMv6 style unaligned access support. This fixes configurations where it was disabled and the ARMv6-M processors where it is not supported. Change-Id: I00c9bb19ba582b64ecb9eaa6da9887ba0df8fd3c Reviewed-by: Julien Brianceau <jbriance@cisco.com> Reviewed-by: Jocelyn Turcotte <jocelyn.turcotte@digia.com>
Diffstat (limited to 'Source/WTF/wtf/Platform.h')
-rw-r--r--Source/WTF/wtf/Platform.h18
1 files changed, 11 insertions, 7 deletions
diff --git a/Source/WTF/wtf/Platform.h b/Source/WTF/wtf/Platform.h
index a4635a4fa..256474412 100644
--- a/Source/WTF/wtf/Platform.h
+++ b/Source/WTF/wtf/Platform.h
@@ -295,14 +295,18 @@
#define WTF_THUMB_ARCH_VERSION 0
#endif
-
-/* CPU(ARMV5_OR_LOWER) - ARM instruction set v5 or earlier */
-/* On ARMv5 and below the natural alignment is required.
- And there are some other differences for v5 or earlier. */
-#if !defined(ARMV5_OR_LOWER) && !WTF_ARM_ARCH_AT_LEAST(6)
-#define WTF_CPU_ARMV5_OR_LOWER 1
+/* CPU(ARM_FEATURE_UNALIGNED) - ARM instruction set supports unaligned access */
+/* On ARMv5 and below the natural alignment is required. */
+#if !defined(WTF_CPU_ARM_FEATURE_UNALIGNED)
+#if COMPILER(GCC) && GCC_VERSION_AT_LEAST(4, 7, 0)
+/* Check for feature define in case we are building with -mno-unaligned-access or for ARMv6-M */
+#if defined(__ARM_FEATURE_UNALIGNED)
+#define WTF_CPU_ARM_FEATURE_UNALIGNED 1
+#endif
+#elif WTF_ARM_ARCH_AT_LEAST(6)
+#define WTF_CPU_ARM_FEATURE_UNALIGNED 1
+#endif
#endif
-
/* CPU(ARM_TRADITIONAL) - Thumb2 is not available, only traditional ARM (v4 or greater) */
/* CPU(ARM_THUMB2) - Thumb2 instruction set is available */