diff options
Diffstat (limited to 'chromium/v8/src/ppc/constants-ppc.h')
-rw-r--r-- | chromium/v8/src/ppc/constants-ppc.h | 73 |
1 files changed, 37 insertions, 36 deletions
diff --git a/chromium/v8/src/ppc/constants-ppc.h b/chromium/v8/src/ppc/constants-ppc.h index b304bad7ceb..4c404ae911f 100644 --- a/chromium/v8/src/ppc/constants-ppc.h +++ b/chromium/v8/src/ppc/constants-ppc.h @@ -18,8 +18,7 @@ namespace internal { const int kNumRegisters = 32; // FP support. -const int kNumFPDoubleRegisters = 32; -const int kNumFPRegisters = kNumFPDoubleRegisters; +const int kNumDoubleRegisters = 32; const int kNoRegister = -1; @@ -229,6 +228,7 @@ enum OpcodeExt2 { LHAUX = 375 << 1, // load half-word algebraic w/ update x-form XORX = 316 << 1, // Exclusive OR MFSPR = 339 << 1, // Move from Special-Purpose-Register + POPCNTW = 378 << 1, // Population Count Words STHX = 407 << 1, // store half-word w/ x-form ORC = 412 << 1, // Or with Complement STHUX = 439 << 1, // store half-word w/ update x-form @@ -238,6 +238,7 @@ enum OpcodeExt2 { MTSPR = 467 << 1, // Move to Special-Purpose-Register DIVD = 489 << 1, // Divide Double Word DIVW = 491 << 1, // Divide Word + POPCNTD = 506 << 1, // Population Count Doubleword // Below represent bits 10-1 (any value >= 512) LFSX = 535 << 1, // load float-single w/ x-form @@ -274,24 +275,29 @@ enum OpcodeExt4 { FMADD = 29 << 1, // Floating Multiply-Add // Bits 10-1 - FCMPU = 0 << 1, // Floating Compare Unordered - FRSP = 12 << 1, // Floating-Point Rounding - FCTIW = 14 << 1, // Floating Convert to Integer Word X-form - FCTIWZ = 15 << 1, // Floating Convert to Integer Word with Round to Zero - FNEG = 40 << 1, // Floating Negate - MCRFS = 64 << 1, // Move to Condition Register from FPSCR - FMR = 72 << 1, // Floating Move Register - MTFSFI = 134 << 1, // Move to FPSCR Field Immediate - FABS = 264 << 1, // Floating Absolute Value - FRIN = 392 << 1, // Floating Round to Integer Nearest - FRIZ = 424 << 1, // Floating Round to Integer Toward Zero - FRIP = 456 << 1, // Floating Round to Integer Plus - FRIM = 488 << 1, // Floating Round to Integer Minus - MFFS = 583 << 1, // move from FPSCR x-form - MTFSF = 711 << 1, // move to FPSCR fields XFL-form - FCFID = 846 << 1, // Floating convert from integer doubleword - FCTID = 814 << 1, // Floating convert from integer doubleword - FCTIDZ = 815 << 1 // Floating convert from integer doubleword + FCMPU = 0 << 1, // Floating Compare Unordered + FRSP = 12 << 1, // Floating-Point Rounding + FCTIW = 14 << 1, // Floating Convert to Integer Word X-form + FCTIWZ = 15 << 1, // Floating Convert to Integer Word with Round to Zero + MTFSB1 = 38 << 1, // Move to FPSCR Bit 1 + FNEG = 40 << 1, // Floating Negate + MCRFS = 64 << 1, // Move to Condition Register from FPSCR + MTFSB0 = 70 << 1, // Move to FPSCR Bit 0 + FMR = 72 << 1, // Floating Move Register + MTFSFI = 134 << 1, // Move to FPSCR Field Immediate + FABS = 264 << 1, // Floating Absolute Value + FRIN = 392 << 1, // Floating Round to Integer Nearest + FRIZ = 424 << 1, // Floating Round to Integer Toward Zero + FRIP = 456 << 1, // Floating Round to Integer Plus + FRIM = 488 << 1, // Floating Round to Integer Minus + MFFS = 583 << 1, // move from FPSCR x-form + MTFSF = 711 << 1, // move to FPSCR fields XFL-form + FCTID = 814 << 1, // Floating convert to integer doubleword + FCTIDZ = 815 << 1, // ^^^ with round toward zero + FCFID = 846 << 1, // Floating convert from integer doubleword + FCTIDU = 942 << 1, // Floating convert to integer doubleword unsigned + FCTIDUZ = 943 << 1, // ^^^ with round toward zero + FCFIDU = 974 << 1 // Floating convert from integer doubleword unsigned }; enum OpcodeExt5 { @@ -398,6 +404,13 @@ enum CRBit { CR_LT = 0, CR_GT = 1, CR_EQ = 2, CR_SO = 3, CR_FU = 3 }; #define CRWIDTH 4 +// These are the documented bit positions biased down by 32 +enum FPSCRBit { + VXSOFT = 21, // 53: Software-Defined Condition + VXSQRT = 22, // 54: Invalid Square Root + VXCVI = 23 // 55: Invalid Integer Convert +}; + // ----------------------------------------------------------------------------- // Supervisor Call (svc) specific support. @@ -564,35 +577,23 @@ class Instruction { // Helper functions for converting between register numbers and names. class Registers { public: - // Return the name of the register. - static const char* Name(int reg); - // Lookup the register number for the name provided. static int Number(const char* name); - struct RegisterAlias { - int reg; - const char* name; - }; - private: static const char* names_[kNumRegisters]; - static const RegisterAlias aliases_[]; }; // Helper functions for converting between FP register numbers and names. -class FPRegisters { +class DoubleRegisters { public: - // Return the name of the register. - static const char* Name(int reg); - // Lookup the register number for the name provided. static int Number(const char* name); private: - static const char* names_[kNumFPRegisters]; + static const char* names_[kNumDoubleRegisters]; }; -} -} // namespace v8::internal +} // namespace internal +} // namespace v8 #endif // V8_PPC_CONSTANTS_PPC_H_ |