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| author | Thiago Macieira <thiago.macieira@intel.com> | 2017-06-09 11:42:36 -0700 |
|---|---|---|
| committer | Thiago Macieira <thiago.macieira@intel.com> | 2017-06-12 16:18:11 +0000 |
| commit | 57d16c12ccb8d50e208078c37d13fa752eab98e1 (patch) | |
| tree | 3c282cc003bf1314499587d235eeb078b9798979 /src | |
| parent | 71090f09509d52451e68b33e3e26807822849721 (diff) | |
| download | qtbase-57d16c12ccb8d50e208078c37d13fa752eab98e1.tar.gz | |
qsimd_p.h: Don't set the __xxx__ variables with Clang and GCC
Commit 418184c2a0ad97cce12717a43f84fa6f12ece189 set some extra defines
that Clang and GCC do set so that MSVC and ICC builds would properly get
the features detected. But that meant we set them with Clang and GCC
(technically, set them again, but to the same value so no warning was
printed).
Don't do that. This commit allows me to use "-march=native -mno-rdrnd"
to disable the unconditional use of RDRAND instruction. That's required
to valgrind any applications, as the current version (3.12) does not
have support for that instruction.
vex amd64->IR: unhandled instruction bytes: 0x48 0xF 0xC7 0xF0 0x48 0x8B 0x55 0xE8 0x48 0x89
vex amd64->IR: REX=1 REX.W=1 REX.R=0 REX.X=0 REX.B=0
vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x0 ESC=0F
vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
==78321== valgrind: Unrecognised instruction at address 0x4ef159c.
==78321== at 0x4EF159C: _rdrand64_step (immintrin.h:208)
==78321== by 0x4EF159C: qt_random_cpu(void*, long long) (qrandom.cpp:95)
Change-Id: Ia3e896da908f42939148fffd14c6884501de4fa4
Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>
Diffstat (limited to 'src')
| -rw-r--r-- | src/corelib/tools/qsimd_p.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/corelib/tools/qsimd_p.h b/src/corelib/tools/qsimd_p.h index 28253b3ae9..023a4b08d2 100644 --- a/src/corelib/tools/qsimd_p.h +++ b/src/corelib/tools/qsimd_p.h @@ -232,7 +232,7 @@ #if defined(__SSE4_2__) || (defined(QT_COMPILER_SUPPORTS_SSE4_2) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS)) #include <nmmintrin.h> -# if defined(__SSE4_2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) +# if defined(__SSE4_2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) // POPCNT instructions: // All processors that support SSE4.2 support POPCNT // (but neither MSVC nor the Intel compiler define this macro) @@ -245,7 +245,7 @@ // immintrin.h is the ultimate header, we don't need anything else after this #include <immintrin.h> -# if defined(__AVX__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) +# if defined(__AVX__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) // AES, PCLMULQDQ instructions: // All processors that support AVX support AES, PCLMULQDQ // (but neither MSVC nor the Intel compiler define these macros) @@ -253,7 +253,7 @@ # define __PCLMUL__ 1 # endif -# if defined(__AVX2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) +# if defined(__AVX2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) // F16C & RDRAND instructions: // All processors that support AVX2 support F16C & RDRAND: // (but neither MSVC nor the Intel compiler define these macros) |