| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits | Maciej W. Rozycki | 2014-11-07 | 1 | -3/+5 |
| * | target-mips: add MSA support to mips32r5-generic | Yongbok Kim | 2014-11-03 | 1 | -2/+2 |
| * | target-mips: add msa_reset(), global msa register | Yongbok Kim | 2014-11-03 | 1 | -0/+34 |
| * | target-mips: enable features in MIPS64R6-generic CPU | Leon Alrae | 2014-11-03 | 1 | -2/+9 |
| * | target-mips: add TLBINV support | Leon Alrae | 2014-11-03 | 1 | -0/+2 |
| * | target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} | Leon Alrae | 2014-11-03 | 1 | -0/+2 |
| * | target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA | Leon Alrae | 2014-10-14 | 1 | -0/+30 |
| * | target-mips: Avoid shifting left into sign bit | Peter Maydell | 2014-03-27 | 1 | -11/+11 |
| * | exec: Change cpu_abort() argument to CPUState | Andreas Färber | 2014-03-13 | 1 | -1/+3 |
| * | target-mips: add user-mode FR switch support for MIPS32r5 | Petar Jovanovic | 2014-02-10 | 1 | -4/+5 |
| * | target-mips: add support for CP0_Config5 | Petar Jovanovic | 2014-02-10 | 1 | -1/+11 |
| * | target-mips: add support for CP0_Config4 | Petar Jovanovic | 2014-02-10 | 1 | -1/+8 |
| * | target-mips: add CPU definition for MIPS32R5 | Petar Jovanovic | 2014-02-10 | 1 | -0/+25 |
| * | target-mips: fix 34Kf configuration for DSP ASE | Yongbok Kim | 2013-08-03 | 1 | -4/+3 |
| * | target-mips: Add ASE DSP processors | Jia Liu | 2012-10-31 | 1 | -0/+52 |
| * | mips: Default to using one VPE and one TC. | Edgar E. Iglesias | 2011-09-06 | 1 | -1/+1 |
| * | mips: Enable VInt interrupt mode for the 34Kf | Edgar E. Iglesias | 2011-09-06 | 1 | -1/+1 |
| * | Use glib memory allocation and free functions | Anthony Liguori | 2011-08-20 | 1 | -2/+2 |
| * | Fix typos in comments (interupt -> interrupt) | Stefan Weil | 2011-05-08 | 1 | -1/+1 |
| * | Fix typo in code and comments | Stefan Weil | 2011-05-06 | 1 | -1/+1 |
| * | target-xxx: Use fprintf_function (format checking) | Stefan Weil | 2010-10-30 | 1 | -1/+1 |
| * | Remove unused constant | Hervé Poussineau | 2010-07-31 | 1 | -4/+0 |
| * | MIPS: Initial support of fulong mini pc (CPU definition) | Huacai Chen | 2010-06-29 | 1 | -0/+35 |
| * | target-mips: No MIPS16 support for 4Kc, 4KEc cores | Stefan Weil | 2009-12-17 | 1 | -3/+3 |
| * | target-mips: 4Kc, 4KEc cores do not support MIPS16 | Stefan Weil | 2009-12-16 | 1 | -3/+3 |
| * | target-mips: fix user-mode emulation startup | Nathan Froyd | 2009-12-13 | 1 | -8/+0 |
| * | target-mips: set Config1.CA for MIPS16-aware CPUs | Nathan Froyd | 2009-12-13 | 1 | -9/+18 |
| * | target-mips: make CP0_LLAddr register CPU dependent | Aurelien Jarno | 2009-11-22 | 1 | -0/+32 |
| * | mips: fix cpu_reset memory leak | Blue Swirl | 2009-11-14 | 1 | -50/+0 |
| * | Revert "Get rid of _t suffix" | Anthony Liguori | 2009-10-01 | 1 | -10/+10 |
| * | Get rid of _t suffix | malc | 2009-10-01 | 1 | -10/+10 |
| * | Update to a hopefully more future proof FSF address | Blue Swirl | 2009-07-16 | 1 | -2/+1 |
| * | target-mips: rename helpers from do_ to helper_ | aurel32 | 2009-03-08 | 1 | -4/+4 |
| * | target-mips: fix indentation | aurel32 | 2009-01-14 | 1 | -42/+42 |
| * | target-mips: get rid of tests on env->user_mode_only | aurel32 | 2009-01-12 | 1 | -10/+10 |
| * | Update FSF address in GPL/LGPL boilerplate | aurel32 | 2009-01-04 | 1 | -1/+1 |
| * | Use the ARRAY_SIZE() macro where appropriate. | malc | 2008-12-22 | 1 | -2/+2 |
| * | Move the active FPU registers into env again, and use more TCG registers | ths | 2008-09-18 | 1 | -3/+6 |
| * | target-mips: fix warning | aurel32 | 2008-09-14 | 1 | -1/+1 |
| * | Build fix for gcc-3.3. | ths | 2008-09-02 | 1 | -0/+4 |
| * | Less hardcoding of TARGET_USER_ONLY. | ths | 2008-07-23 | 1 | -15/+12 |
| * | A bunch of minor code improvements in the MIPS target. | ths | 2008-07-21 | 1 | -1/+1 |
| * | Fix compiler warning, by Stefan Weil. | ths | 2008-07-20 | 1 | -1/+1 |
| * | More efficient target register / TC accesses. | ths | 2008-06-27 | 1 | -2/+0 |
| * | Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford. | ths | 2008-05-28 | 1 | -0/+1 |
| * | Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver. | ths | 2008-05-06 | 1 | -0/+2 |
| * | Use TCG for MIPS GPR moves. | ths | 2008-05-06 | 1 | -0/+2 |
| * | Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford. | ths | 2007-12-28 | 1 | -3/+3 |
| * | Support for VR5432, and some of its special instructions. Original patch | ths | 2007-12-25 | 1 | -0/+16 |
| * | 5K and 20K are Release 1 CPUs. | ths | 2007-12-25 | 1 | -3/+3 |
