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| author | Matti Picus <matti.picus@gmail.com> | 2020-12-09 22:54:41 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-09 22:54:41 +0200 |
| commit | 91d9bbebc159ada6cccd0e1fcec1926e26b19c6f (patch) | |
| tree | 9a6030879760b56d8f8683bf536e798e82ad197d | |
| parent | 26f8b11b6e5529789d8e8f6c677ac02432d84f59 (diff) | |
| parent | 6edf451f7fe0e3a77e545733d119d2a03754ee5b (diff) | |
| download | numpy-91d9bbebc159ada6cccd0e1fcec1926e26b19c6f.tar.gz | |
Merge pull request #17971 from seiko2plus/issue_17969
BUG, SIMD: Fix direactive check for AVX512BW of intrinsics npyv_tobits_*
| -rw-r--r-- | numpy/core/src/common/simd/avx512/conversion.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/numpy/core/src/common/simd/avx512/conversion.h b/numpy/core/src/common/simd/avx512/conversion.h index bd92abccd..6ad299dd5 100644 --- a/numpy/core/src/common/simd/avx512/conversion.h +++ b/numpy/core/src/common/simd/avx512/conversion.h @@ -56,7 +56,7 @@ NPY_FINLINE npy_uint64 npyv_tobits_b8(npyv_b8 a) { #ifdef NPY_HAVE_AVX512BW_MASK return (npy_uint64)_cvtmask64_u64(a); -#elif NPY_HAVE_AVX512BW +#elif defined(NPY_HAVE_AVX512BW) return (npy_uint64)a; #else int mask_lo = _mm256_movemask_epi8(npyv512_lower_si256(a)); @@ -68,7 +68,7 @@ NPY_FINLINE npy_uint64 npyv_tobits_b16(npyv_b16 a) { #ifdef NPY_HAVE_AVX512BW_MASK return (npy_uint32)_cvtmask32_u32(a); -#elif NPY_HAVE_AVX512BW +#elif defined(NPY_HAVE_AVX512BW) return (npy_uint32)a; #else __m256i pack = _mm256_packs_epi16( |