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| author | Sayed Adel <seiko@imavr.com> | 2020-02-06 05:49:47 +0200 |
|---|---|---|
| committer | Sayed Adel <seiko@imavr.com> | 2020-02-06 05:51:24 +0200 |
| commit | b4adb831936b10a5c12d65e5c1ee206100988ee2 (patch) | |
| tree | 0ef53670798cb7fa9791a6a1e5c57a4a508c4bd9 | |
| parent | e682fc21b20a58f5665a78fdd7d9785320a03ab7 (diff) | |
| download | numpy-b4adb831936b10a5c12d65e5c1ee206100988ee2.tar.gz | |
BUG: Fix inline assembly that detects cpu features on x86(32bit)
| -rw-r--r-- | numpy/core/src/common/npy_cpu_features.c.src | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/numpy/core/src/common/npy_cpu_features.c.src b/numpy/core/src/common/npy_cpu_features.c.src index cbd99827b..4f193a471 100644 --- a/numpy/core/src/common/npy_cpu_features.c.src +++ b/numpy/core/src/common/npy_cpu_features.c.src @@ -94,15 +94,21 @@ npy__cpu_cpuid(int reg[4], int func_id) __cpuid(reg, func_id); #elif defined(__GNUC__) || defined(__clang__) #if defined(NPY_CPU_X86) && defined(__PIC__) - // %ebx may be the PIC register - #define NPY__CPUID_ASM \ - "xchg{l}\t{%%}ebx, %1\n\t" \ - "cpuid\n\t" \ - "xchg{l}\t{%%}ebx, %1\n\t" + // %ebx may be the PIC register + __asm__("xchg{l}\t{%%}ebx, %1\n\t" + "cpuid\n\t" + "xchg{l}\t{%%}ebx, %1\n\t" + : "=a" (reg[0]), "=r" (reg[1]), "=c" (reg[2]), + "=d" (reg[3]) + : "a" (func_id), "c" (0) + ); #else - #define NPY__CPUID_ASM "cpuid" + __asm__("cpuid\n\t" + : "=a" (reg[0]), "=b" (reg[1]), "=c" (reg[2]), + "=d" (reg[3]) + : "a" (func_id), "c" (0) + ); #endif - __asm__(NPY__CPUID_ASM : "=a" (reg[0]), "=b" (reg[1]), "=c" (reg[2]), "=d" (reg[3]) : "a" (func_id), "c" (0) : ); #else // TODO: handle other x86 compilers reg[0] = 0; |