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| * Cleaned up the previous patchl1pmMartin Mares2016-09-262-22/+15
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| * lspci: Parse all the L1 PM substate capability regsRajat Jain2016-09-262-28/+80
| | | | | | | | | | | | | | Parse the control registers to display all the L1 PM substate configuration information. Signed-off-by: Rajat Jain <rajatja@google.com>
* | setpci: fix length of SUBSYSTEM_VENDOR_IDCharles.Rose@dell.com2016-09-261-1/+1
|/ | | | | | | SUBSYSTEM_VENDOR_ID should be 2 bytes, not 4. Thanks to Christopher Arzola for catching this. Signed-off-by: Charles Rose <charles_rose@dell.com>
* Released as 3.5.1.v3.5.1Martin Mares2016-05-222-1/+7
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* Fix symbol versioning of pci_init()Martin Mares2016-05-222-0/+3
| | | | Thanks to Ian Stakenvicius <axs@gentoo.org> for reporting the bug.
* Released as 3.5.0.v3.5.0Martin Mares2016-05-193-3/+20
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* Updated pci.ids to today's snapshotMartin Mares2016-05-191-117/+580
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* lspci: Add test case for PTMYong, Jonathan2016-05-192-0/+576
| | | | | | | These are the software dummy PTM master and endpoints, but should be enough to test register decoding. Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com>
* Merge branch 'dpc'Martin Mares2016-05-144-0/+152
|\ | | | | | | | | Conflicts: lib/header.h
| * Add support for Downstream Port ContainmentKeith Busch2016-05-144-0/+152
| | | | | | | | | | | | | | The PCI SIG added the Downstream Port Containment capability. This patch decodes this for lspci, and defines the extended capability for setpci. Signed-off-by: Keith Busch <keith.busch@intel.com>
* | Domains: Legacy 16-bit domain numbers are maintained in generic codeMartin Mares2016-05-143-11/+16
| | | | | | | | | | | | | | Previously, backward compatibility was kept only with the sysfs back-end. Also, domains which do not fit in 16 bits are replaced by 0xffff.
* | Domains: Upgraded ABI version to 3.5Martin Mares2016-05-143-4/+5
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* | Merge branch 'domains'Martin Mares2016-05-146-5/+24
|\ \ | | | | | | | | | | | | Conflicts: lib/pci.h
| * | pciutils: Add support for 32-bit PCI domainsKeith Busch2016-05-146-5/+24
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for new host bridges that may create PCI domain number values requiring more than 16 bits. The new domain 32-bit integer is signed to allow -1 for "any", and is sufficient as the domain number will never require the full 32-bits. The domain field is appended at the end of struct pci_dev, and the current location of the 16-bit domain remains for compatibility. The domain number is truncated and copied into the legacy domain location so existing applications linking to the library will continue to work without modification. We accept that these applications may not work correctly on machines with host bridges exporting 32-bit domains. In order to force new programs to link to the new ABI, the pci_init function call is versioned in this commit. Signed-off-by: Keith Busch <keith.busch@intel.com>
* | NetBSD: Make extended configuration space availableMartin Mares2016-05-141-1/+1
| | | | | | | | Patch by Masanobu SAITOH <msaitoh@execsw.org>.
* | A few minor corrections to the IORESOURCE changesMartin Mares2016-05-144-6/+7
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* | Add support for enhanced allocation regionsSean O. Stalley2016-05-148-15/+38
| | | | | | | | | | | | | | | | | | | | | | Append [enhanced] to Regions that contain the BEI flag in sysfs. To do this, we need to add the resource flags to the pci_dev struct. This struct is passed through the libpci API, so we increment the API version number. Don't truncate least significant bits of the region size. ex: a 2000 byte region should display [size=2000] instead of [size=1K] Signed-off-by: Sean O. Stalley <sean.stalley@intel.com>
* | lspci: Decode Precision Time Measurement capabiltityYong, Jonathan2016-05-142-0/+63
|/ | | | | | | | Section 7.32 Precision Time Management (or Measurement) from the PCI Express Base 3.1 specification is an optional Extended Capability for discovering and controlling the distribution of a PTM Hierarchy. Signed-off-by: Yong, Jonathan <jonathan.yong@intel.com>
* Released as 3.4.1.v3.4.1Martin Mares2016-01-034-6/+21
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* pci.ids updated to today's snapshotMartin Mares2016-01-031-53/+318
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* Add lspci support for Enhanced Allocation Capability.David Daney2016-01-033-0/+488
| | | | | The PCISIG recently added the Enhanced Allocation Capability. Decode it in lspci.
* lspci: Decode DevCap SlotPowerLimit for all components with Upstream PortsBjorn Helgaas2015-12-221-1/+2
| | | | | | | | | | | | | | | | | | The SlotPowerLimit in the Slot Capability indicates how much power the slot can supply to a downstream device. A Root Port or Switch Downstream Port communicates the limit via a Set_Slot_Power_Limit Message on the link. The component on the other end of the link copies the limit from the message to the Captured Slot Power Limit in its Device Capability [see PCIe r3.0, sec 2.2.8.5]. The Captured SlotPowerLimit is relevant for all devices on the downstream end of a Link. This includes Endpoints and Bridges as well as Switch Upstream Ports. Decode the DevCap Captured SlotPowerLimit for Endpoints and Bridges as well as Switch Upstream Ports. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Omit unnecessary commas in PASID/PRI capabilitiesMartin Mares2015-10-271-4/+4
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* Decode PASID and PRI extended capabilitiesDavid Woodhouse2015-10-273-0/+369
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* README: SourceForge mirrors replaced by GitHubMartin Mares2015-09-191-1/+2
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* Maint: Remember to push to Github, tooMartin Mares2015-09-191-0/+2
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* Released as 3.4.0.v3.4.0originMartin Mares2015-09-143-3/+16
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* Updated pci.ids to today's snapshotMartin Mares2015-09-141-487/+943
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* lib/configure: Also accept host tuples without vendor stringFelix Janda2015-09-141-1/+1
| | | | | Based on patch from https://bugs.gentoo.org/show_bug.cgi?id=425022
* lspci calls pci_fill_info() only as neededpublicMartin Mares2015-09-141-5/+8
| | | | | Previously, lspci always asked for all attributes, even in terse mode where most of them are not shown.
* Sysfs: Read failures of optional attributes are not fatalMartin Mares2015-09-141-4/+11
| | | | | | | | Ameya Palande reported that with some kernels, reads of such attributes fail on some hardware. He suggested to ignore read failures completely, but I decided to turn the errors into warnings in such cases. At least, the user will know that something fishy is going on.
* Oops, numa_node should not be a mandatory attributeMartin Mares2015-09-141-9/+13
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* Updated fixed-version references to pci_fill_infoMartin Mares2015-09-142-2/+2
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* NUMA node scanning is now done in an ABI-compatible wayMartin Mares2015-09-146-22/+33
| | | | | | The numa_node field was moved to the end of the public part of struct pci_dev. As usually, it has to be requested using the PCI_FILL_NUMA_NODE and pci_fill_info() is versioned.
* Whitespace fixesMartin Mares2015-09-141-1/+1
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* Improved reporting of NUMA nodesMartin Mares2015-09-142-0/+8
| | | | They are also printed in "-vv" and "-nv" modes now.
* Report NUMA node in lspci -vMatthew Wilcox2015-09-144-0/+5
| | | | | | | | | | | | | In multi-socket systems, it's useful to see which node a particular PCI device belongs to. Linux provides this information through sysfs, but some users don't like poking through sysfs themselves to find it, and it's pretty straightforward to report it in lspci. I should note that when there is no NUMA node for a particular device, Linux reports -1. I've chosen to continue that convention in pciutils, and simply omit the information if the device does not belong to a NUMA node (eg on single-socket systems, or devices which are not preferentially attached to a particular node, like Nehalem-based systems).
* Fixed naming inconsistency in man page: slot vs. deviceMartin Mares2015-09-141-2/+2
| | | | Thanks to Robert Urban for pointing it out.
* Fix broken backward compat struct translation for pci filtersLucas Stach2015-04-161-2/+2
| | | | | | | This seems to be a copy&paste error in both directions of the compat translation. Signed-off-by: Lucas Stach <dev@lynxeye.de>
* Fixing up release 3.3.1 to contain new pci.idsv3.3.1Martin Mares2015-04-092-0/+4
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* Update pci.ids to today's snapshotMartin Mares2015-04-091-117/+633
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* Released as 3.3.1.Martin Mares2015-04-094-6/+19
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* pread.h: Remove support for libc5Felix Janda2015-04-091-9/+0
| | | | | The support code for libc5 breaks building on linux i386 with other libcs that don't define __GLIBC__.
* Maint: Make sure that there are no Vim swap files in the tarballMartin Mares2015-01-221-0/+1
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* Fixed memory allocation bug in name cache path codeMartin Mares2015-01-221-1/+1
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* Improved listing of vendor-specific informationMartin Mares2015-01-221-15/+21
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* Added test case for virtioMartin Mares2015-01-221-0/+41
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* Add virtio vendor capability supportGerd Hoffmann2015-01-224-2/+82
| | | | | | | | | | | virtio uses vendor-specific capabilities to specify the location of the virtio register ranges. The specification can be found here: http://docs.oasis-open.org/virtio/virtio/v1.0/cs01/virtio-v1.0-cs01.html#x1-690004 This patch adds support for decoding these capabilities to lspci. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* Fix small memory leak in names-cacheMartin Mares2014-12-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tomáš Chvátal <tchvatal@suse.cz> --- lib/names-cache.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/names-cache.c b/lib/names-cache.c index 90a6454..c97ea30 100644 --- a/lib/names-cache.c +++ b/lib/names-cache.c @@ -39,7 +39,8 @@ static char *get_cache_name(struct pci_access *a) buf = pci_malloc(a, strlen(pw->pw_dir) + strlen(name+1) + 1); sprintf(buf, "%s%s", pw->pw_dir, name+1); pci_set_param_internal(a, "net.cache_name", buf, 0); - return buf; + pci_mfree(buf); + return pci_get_param(a, "net.cache_name"); } int -- 2.1.3
* Maintenance scripts now upload to kernel.org automaticallyMartin Mares2014-11-103-6/+28
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