diff options
| author | David Box <david.e.box@linux.intel.com> | 2013-06-10 18:09:59 -0700 |
|---|---|---|
| committer | Martin Mares <mj@ucw.cz> | 2013-06-11 09:35:17 +0200 |
| commit | 214c9a952d904cc519bef9806b9acdef44d9ea87 (patch) | |
| tree | 4681e9ed52593428755e552f5d058c81b82705cb | |
| parent | 87bc7e64dab51e2627fa8b2536d9c3218b8f75e7 (diff) | |
| download | pciutils-214c9a952d904cc519bef9806b9acdef44d9ea87.tar.gz | |
lspci: Add L1 PM Substate capability reporting
Expose available L1 substate capabilities that can enable lower power
consumption when a PCIe Link is idle.
Signed-off-by: David Box <david.e.box@linux.intel.com>
| -rw-r--r-- | lib/header.h | 1 | ||||
| -rw-r--r-- | ls-ecaps.c | 55 |
2 files changed, 56 insertions, 0 deletions
diff --git a/lib/header.h b/lib/header.h index 69518fd..6608003 100644 --- a/lib/header.h +++ b/lib/header.h @@ -226,6 +226,7 @@ #define PCI_EXT_CAP_ID_SRIOV 0x10 /* Single Root I/O Virtualization */ #define PCI_EXT_CAP_ID_TPH 0x17 /* Transaction processing hints */ #define PCI_EXT_CAP_ID_LTR 0x18 /* Latency Tolerance Reporting */ +#define PCI_EXT_CAP_ID_L1PM 0x1e /* L1 PM Substates */ /*** Definitions of capabilities ***/ @@ -448,6 +448,58 @@ cap_evendor(struct device *d, int where) BITS(hdr, 20, 12)); } +static void +cap_l1pm(struct device *d, int where) +{ + u32 l1_cap; + int power_on_scale; + + printf("L1 PM Substates\n"); + + if (verbose < 2) + return; + + if (!config_fetch(d, where + 4, 4)) + { + printf("\t\t<unreadable>\n"); + return; + } + + l1_cap = get_conf_long(d, where + 4); + printf("\t\tL1SubCap: "); + printf("PCI-PM_L1.2%c, PCI-PM_L1.1%c, ASPM_L1.2%c, ASPM_L1.1%c, L1_PM_Substates%c\n", + FLAG(l1_cap, 1), + FLAG(l1_cap, 2), + FLAG(l1_cap, 4), + FLAG(l1_cap, 8), + FLAG(l1_cap, 16)); + + if (BITS(l1_cap, 0, 1) || BITS(l1_cap, 2, 1)) + { + printf("\t\t\t PortCommonModeRestoreTime=%dus, ", + BITS(l1_cap, 8,8)); + + power_on_scale = BITS(l1_cap, 16, 2); + + printf("PortTPowerOnTime="); + switch (power_on_scale) + { + case 0: + printf("%dus\n", BITS(l1_cap, 19, 5) * 2); + break; + case 1: + printf("%dus\n", BITS(l1_cap, 19, 5) * 10); + break; + case 2: + printf("%dus\n", BITS(l1_cap, 19, 5) * 100); + break; + default: + printf("<error>\n"); + break; + } + } +} + void show_ext_caps(struct device *d) { @@ -526,6 +578,9 @@ show_ext_caps(struct device *d) case PCI_EXT_CAP_ID_LTR: cap_ltr(d, where); break; + case PCI_EXT_CAP_ID_L1PM: + cap_l1pm(d, where); + break; default: printf("#%02x\n", id); break; |