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| author | Jonathan Lennox <jonathan@vidyo.com> | 2015-08-03 17:04:27 -0400 |
|---|---|---|
| committer | Jean-Marc Valin <jmvalin@jmvalin.ca> | 2015-09-01 17:21:31 -0400 |
| commit | 43120f00758219a784f952754f33b9788a8d731b (patch) | |
| tree | b1dd751c49c18c6d7c3a65f30be04476cb2903b6 /celt/celt_lpc.h | |
| parent | cb0875e07d7cac701b465863f532dc5bb8b0eb59 (diff) | |
| download | opus-43120f00758219a784f952754f33b9788a8d731b.tar.gz | |
Reorganize x86 SSE intrinsics code.
Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.
Diffstat (limited to 'celt/celt_lpc.h')
| -rw-r--r-- | celt/celt_lpc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/celt/celt_lpc.h b/celt/celt_lpc.h index dc8967f0..323459eb 100644 --- a/celt/celt_lpc.h +++ b/celt/celt_lpc.h @@ -48,7 +48,7 @@ void celt_fir_c( opus_val16 *mem, int arch); -#if !defined(OPUS_X86_MAY_HAVE_SSE4_1) +#if !defined(OVERRIDE_CELT_FIR) #define celt_fir(x, num, y, N, ord, mem, arch) \ (celt_fir_c(x, num, y, N, ord, mem, arch)) #endif |