added --enable-neural-fec option to configure

5 files changed, 19 insertions, 2 deletions

diff --git a/configure.ac b/configure.ac
index 2cd7a606..9fdb43aa 100644
--- a/configure.ac
+++ b/configure.ac
@@ -162,6 +162,15 @@ AS_IF([test "$enable_custom_modes" = "yes"],[
 
 AM_CONDITIONAL([CUSTOM_MODES], [test "$enable_custom_modes" = "yes"])
 
+AC_ARG_ENABLE([neural-fec],
+    [AS_HELP_STRING([--enable-neural-fec], [Use neural FEC for SILK])],,
+    [enable_neural_fec=yes])
+
+AS_IF([test "$enable_neural_fec" = "yes"],[
+  AC_DEFINE([ENABLE_NEURAL_FEC], [1], [Neural FEC])
+  AC_DEFINE([DISABLE_DOT_PROD], [1], [Disable dot product])
+])  
+
 AC_ARG_ENABLE([neural-plc],
     [AS_HELP_STRING([--enable-neural-plc], [Use neural PLC for SILK])],,
     [enable_neural_plc=yes])
diff --git a/silk/dred_decoder.c b/silk/dred_decoder.c
index 74a0d9bb..ee56e9e9 100644
--- a/silk/dred_decoder.c
+++ b/silk/dred_decoder.c
@@ -73,7 +73,6 @@ void dred_decode_redundancy_package(DREDDec *dec, float *features, opus_uint8 *b
     {
         q_level = (int) round(DRED_ENC_Q0 + 1.f * (DRED_ENC_Q1 - DRED_ENC_Q0) * i / (DRED_NUM_REDUNDANCY_FRAMES - 2));
         offset = q_level * DRED_LATENT_DIM;
-
         dred_decode_latents(
             &dec->ec_dec,
             latents,
diff --git a/silk/enc_API.c b/silk/enc_API.c
index ececbdca..05ce9cb8 100644
--- a/silk/enc_API.c
+++ b/silk/enc_API.c
@@ -41,7 +41,9 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "main_FLP.h"
 #endif
 
+#ifdef ENABLE_NEURAL_FEC
 #include "dred_encoder.h"
+#endif
 
 /***************************************/
 /* Read control structure from encoder */
@@ -466,8 +468,10 @@ opus_int silk_Encode(                                   /* O    Returns error co
             }
             silk_encode_do_VAD_Fxx( &psEnc->state_Fxx[ 0 ], activity );
 
+#ifdef ENABLE_NEURAL_FEC
             /* DRED Encoder */
             dred_encode_silk_frame( &psEnc->state_Fxx[ 0 ].sCmn.dred_encoder, &psEnc->state_Fxx[ 0 ].sCmn.inputBuf[0] );
+#endif
 
             /* Encode */
             for( n = 0; n < encControl->nChannelsInternal; n++ ) {
diff --git a/silk/init_encoder.c b/silk/init_encoder.c
index 8c17e76e..50ec22b3 100644
--- a/silk/init_encoder.c
+++ b/silk/init_encoder.c
@@ -36,7 +36,9 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "tuning_parameters.h"
 #include "cpu_support.h"
 
+#ifdef ENABLE_NEURAL_FEC
 #include "dred_encoder.h"
+#endif
 
 /*********************************/
 /* Initialize Silk Encoder state */
@@ -62,8 +64,9 @@ opus_int silk_init_encoder(
     /* Initialize Silk VAD */
     ret += silk_VAD_Init( &psEnc->sCmn.sVAD );
 
+#ifdef ENABLE_NEURAL_FEC
     /* Initialize DRED Encoder */
     init_dred_encoder( &psEnc->sCmn.dred_encoder );
-
+#endif
     return  ret;
 }
diff --git a/silk/structs.h b/silk/structs.h
index 8bb90122..61ede13c 100644
--- a/silk/structs.h
+++ b/silk/structs.h
@@ -234,7 +234,9 @@ typedef struct {
     opus_int                     LBRR_GainIncreases;                /* Gains increment for coding LBRR frames                           */
     SideInfoIndices              indices_LBRR[ MAX_FRAMES_PER_PACKET ];
     opus_int8                    pulses_LBRR[ MAX_FRAMES_PER_PACKET ][ MAX_FRAME_LENGTH ];
+#ifdef ENABLE_NEURAL_FEC
     DREDEnc                      dred_encoder;
+#endif
 } silk_encoder_state;