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authorJames Cowgill <james410@cowgill.org.uk>2015-10-19 21:58:20 +0200
committerJames Cowgill <james410@cowgill.org.uk>2015-10-19 21:58:20 +0200
commit0fc170a37dcc5869f782090a160f2d2da8a6cc18 (patch)
tree9fd453d6b536d42307870c15250beb4d01a7c520
parentf2847a1cc94fef6455ef946fd3e56a50db4738a8 (diff)
downloadnspr-hg-0fc170a37dcc5869f782090a160f2d2da8a6cc18.tar.gz
Bug 1129878, enable atomic instructions on mips, r=wtc,hev
-rw-r--r--pr/include/md/_linux.h10
-rw-r--r--pr/include/pratom.h4
2 files changed, 13 insertions, 1 deletions
diff --git a/pr/include/md/_linux.h b/pr/include/md/_linux.h
index 2a2ad53d..c29ba5ce 100644
--- a/pr/include/md/_linux.h
+++ b/pr/include/md/_linux.h
@@ -162,6 +162,16 @@ extern PRInt32 _PR_ppc_AtomicSet(PRInt32 *val, PRInt32 newval);
#endif
#endif
+#if defined(__mips__) && defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
+/* Use GCC built-in functions */
+#define _PR_HAVE_ATOMIC_OPS
+#define _MD_INIT_ATOMIC()
+#define _MD_ATOMIC_INCREMENT(ptr) __sync_add_and_fetch(ptr, 1)
+#define _MD_ATOMIC_DECREMENT(ptr) __sync_sub_and_fetch(ptr, 1)
+#define _MD_ATOMIC_ADD(ptr, i) __sync_add_and_fetch(ptr, i)
+#define _MD_ATOMIC_SET(ptr, nv) __sync_lock_test_and_set(ptr, nv)
+#endif
+
#if defined(__alpha)
#define _PR_HAVE_ATOMIC_OPS
#define _MD_INIT_ATOMIC()
diff --git a/pr/include/pratom.h b/pr/include/pratom.h
index 9dbe0fad..dff9d6c0 100644
--- a/pr/include/pratom.h
+++ b/pr/include/pratom.h
@@ -107,7 +107,9 @@ NSPR_API(PRInt32) PR_AtomicAdd(PRInt32 *ptr, PRInt32 val);
defined(__powerpc__) || \
(defined(__arm__) && \
defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)) || \
- defined(__aarch64__) || defined(__alpha))))
+ defined(__aarch64__) || defined(__alpha) || \
+ (defined(__mips__) && \
+ defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)))))
/*
* Because the GCC manual warns that some processors may support