diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2015-08-20 14:54:21 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 12:37:43 +1000 |
| commit | fede97e41306d326b2d74084d8a77fc9c60bbb9a (patch) | |
| tree | 94a36319a97a8b19cb2978929d91258d36a0cbb1 /drm/nouveau/nvkm/engine/device | |
| parent | 791f7774112f3fb36623c752aac5871975904522 (diff) | |
| download | nouveau-fede97e41306d326b2d74084d8a77fc9c60bbb9a.tar.gz | |
cipher: convert to new-style nvkm_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drm/nouveau/nvkm/engine/device')
| -rw-r--r-- | drm/nouveau/nvkm/engine/device/base.c | 12 | ||||
| -rw-r--r-- | drm/nouveau/nvkm/engine/device/nv50.c | 6 |
2 files changed, 6 insertions, 12 deletions
diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 926e07fe0..e9ed83563 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -898,7 +898,7 @@ nv84_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -929,7 +929,7 @@ nv86_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -960,7 +960,7 @@ nv92_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g84_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -991,7 +991,7 @@ nv94_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = g94_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, @@ -1027,7 +1027,7 @@ nv96_chipset = { // .gr = nv50_gr_new, // .mpeg = g84_mpeg_new, .vp = g84_vp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, .bsp = g84_bsp_new, // .disp = g94_disp_new, // .pm = g84_pm_new, @@ -1084,7 +1084,7 @@ nva0_chipset = { .timer = nv41_timer_new, .volt = nv40_volt_new, .bsp = g84_bsp_new, -// .cipher = g84_cipher_new, + .cipher = g84_cipher_new, // .disp = gt200_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, diff --git a/drm/nouveau/nvkm/engine/device/nv50.c b/drm/nouveau/nvkm/engine/device/nv50.c index 35cc167e7..087edc8d4 100644 --- a/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drm/nouveau/nvkm/engine/device/nv50.c @@ -42,7 +42,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -52,7 +51,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -62,7 +60,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -72,7 +69,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -82,7 +78,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -100,7 +95,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt200_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass; break; |