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authorAlexandre Courbot <acourbot@nvidia.com>2016-01-13 17:21:05 +0900
committerAlexandre Courbot <acourbot@nvidia.com>2016-01-18 18:19:14 +0900
commitecfa40618a0050349d1e38d9b27853d6834e23f6 (patch)
treeb156eb8ff67469c39fcb4e74eaa8cb6442241506 /drm/nouveau/nvkm/engine/device/base.c
parentcbfc85419dc2f189a68f278a897e4d976a3c1fdc (diff)
downloadnouveau-ecfa40618a0050349d1e38d9b27853d6834e23f6.tar.gz
secboot/gm200: add secure-boot support
This patch adds secure-boot for the dGPU set of GM20X chips, using the PMU as the high-secure falcon. This work is based on Deepak Goyal's initial port of Secure Boot to Nouveau. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'drm/nouveau/nvkm/engine/device/base.c')
-rw-r--r--drm/nouveau/nvkm/engine/device/base.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c
index 95fc9a69d..770d3ec13 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1991,6 +1991,7 @@ nv124_chipset = {
.fifo = gm204_fifo_new,
.gr = gm204_gr_new,
.sw = gf100_sw_new,
+ .secboot = gm200_secboot_new,
};
static const struct nvkm_device_chip
@@ -2022,6 +2023,7 @@ nv126_chipset = {
.fifo = gm204_fifo_new,
.gr = gm206_gr_new,
.sw = gf100_sw_new,
+ .secboot = gm200_secboot_new,
};
static const struct nvkm_device_chip