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authorLauri Peltonen <lpeltonen@nvidia.com>2015-02-16 16:39:38 +0900
committerAlexandre Courbot <acourbot@nvidia.com>2016-01-15 14:32:54 +0900
commitab45c79f500237044a3ae14f4a292127c48ba5b2 (patch)
tree5c9b8c04eb7c1df75b414aca28fc3f98c884c2c4 /drm/nouveau/nouveau_dma.h
parent5b4f0a6847cfcbf6a4afd5460bc9b87233b48667 (diff)
downloadnouveau-ab45c79f500237044a3ae14f4a292127c48ba5b2.tar.gz
gem: Split nv50_dma_push
Split this function to provide a version allowing to directly specify a PB entry in its hardware format. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> [acourbot@nvidia.com: split from longer patch] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'drm/nouveau/nouveau_dma.h')
-rw-r--r--drm/nouveau/nouveau_dma.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/drm/nouveau/nouveau_dma.h b/drm/nouveau/nouveau_dma.h
index aff3a9d0a..089ed8498 100644
--- a/drm/nouveau/nouveau_dma.h
+++ b/drm/nouveau/nouveau_dma.h
@@ -31,8 +31,10 @@
#include "nouveau_chan.h"
int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
-void nv50_dma_push(struct nouveau_channel *, struct nouveau_bo *,
- int delta, int length);
+void nv50_dma_push(struct nouveau_channel *chan, uint32_t entry0,
+ uint32_t entry1);
+void nv50_dma_push_bo(struct nouveau_channel *, struct nouveau_bo *,
+ int delta, int length);
/*
* There's a hw race condition where you can't jump to your PUT offset,
@@ -151,8 +153,8 @@ FIRE_RING(struct nouveau_channel *chan)
chan->accel_done = true;
if (chan->dma.ib_max) {
- nv50_dma_push(chan, chan->push.buffer, chan->dma.put << 2,
- (chan->dma.cur - chan->dma.put) << 2);
+ nv50_dma_push_bo(chan, chan->push.buffer, chan->dma.put << 2,
+ (chan->dma.cur - chan->dma.put) << 2);
} else {
WRITE_PUT(chan->dma.cur);
}