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authorAlexandre Courbot <acourbot@nvidia.com>2015-11-20 17:32:03 +0900
committerAlexandre Courbot <acourbot@nvidia.com>2016-01-15 14:32:54 +0900
commit5d664a832ff18734e702eba1c2c070c23290fd68 (patch)
treee8671a9fa87fe23f38d3e1714cc52f7f0a4fed58
parent7c52da1260bd9faadf7bad996e16b23a1c0ab28e (diff)
downloadnouveau-5d664a832ff18734e702eba1c2c070c23290fd68.tar.gz
clk/gm20b: #ifdef Tegra-specific code
-rw-r--r--drm/nouveau/nvkm/subdev/clk/gm20b.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drm/nouveau/nvkm/subdev/clk/gm20b.c b/drm/nouveau/nvkm/subdev/clk/gm20b.c
index d3a81dca6..8ee6c4cb6 100644
--- a/drm/nouveau/nvkm/subdev/clk/gm20b.c
+++ b/drm/nouveau/nvkm/subdev/clk/gm20b.c
@@ -1231,6 +1231,7 @@ gm20b_clk_init(struct nvkm_clk *base)
static int
gm20b_clk_init_fused_params(struct gm20b_clk *priv)
{
+#ifdef CONFIG_TEGRA
struct gm20b_pllg_fused_params *p = &priv->fused_params;
u32 val;
@@ -1252,6 +1253,7 @@ gm20b_clk_init_fused_params(struct gm20b_clk *priv)
return 0;
}
+#endif
/* If no fused parameters, we will try internal calibration later */
return -EINVAL;
@@ -1351,4 +1353,4 @@ gm20b_clk_new(struct nvkm_device *device, int index, struct nvkm_clk **pclk)
clk->pldiv_glitchless_supported = true;
return ret;
-} \ No newline at end of file
+}